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u-boot hangs immediately on new 04/2014 Rev D boards

vadimv

Hello,

I have a Zynq PS/PL design that happily runs on my two Rev D Zedboards, boots using tftpboot, runs great. I'm a longtime Zedboard/Xilinx user, never had serious problems before.

I recently bought 8 new Rev D boards to share with the rest of my development team. I have tried all 8 - every single one fails to boot in the exact same setup as my original 2 that work. I power off working board, unplug, plug in new board exactly the same way, and fail. Booting from JTAG, u-boot gets to approx this step and hangs:

I2C:   ready
Memory: ECC disabled
DRAM: 

Sometimes it hangs when printing out the Memory: line, sometimes in the following line. I can turn off and unplug new Rev D, plug in old Red D, power on, and boot like a champ, so nothing is really changing... The truly bizzare thing is that this behavior only happens on JTAG/TFTP boot. SD card boot works fine. There's nothing in my network for controlling MAC addresses, all the boards look the same to the network. Nonetheless, u-boot fails to load way before  the TFTP step.

New boards have an 0814 datecode and S/N of D57XXXX. Additionally, the new boards have different markings on the DDR3 chips - 4CK77 D9PTK. Old Rev Ds that work were 1334 datecode and had DDR3 of 2WD22 D9LGQ, with an S/N of D53XXXX. That's the only difference, these boards are the same rev after all...

Anyone know what could be happening?  

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    Thought I'd throw my hat in the ring...

    First thing I'd like to know is what version of Vivado are you using?

    Here are a couple possibilities I can think of:

    1) Maybe Petalinux isn't booting properly on these boards. What command line are you executing to boot from JTAG (e.g. "petalinux-boot -prebuilt 3")? When you execute this command, does the Done light go high before you see any UART activity from u-boot? Last, what version of petalinux are you using (latest is 14.2)?.

    2) The hardware platforms you are using might not be using proper DRAM timing parameters. Try creating a new Vivado project in 2014.2 and target the ZedBoard. Then create a new block design and insert a Zynq PS block. Run the design automation to configure it properly for the Zedboard. You can note now that the DDR settings are correct, and the DRAM training settings are all active. Now export the design to SDK and use it for your petalinux project.

    Sam Bobrowicz
    Digilent Inc.

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  • 0

    Thought I'd throw my hat in the ring...

    First thing I'd like to know is what version of Vivado are you using?

    Here are a couple possibilities I can think of:

    1) Maybe Petalinux isn't booting properly on these boards. What command line are you executing to boot from JTAG (e.g. "petalinux-boot -prebuilt 3")? When you execute this command, does the Done light go high before you see any UART activity from u-boot? Last, what version of petalinux are you using (latest is 14.2)?.

    2) The hardware platforms you are using might not be using proper DRAM timing parameters. Try creating a new Vivado project in 2014.2 and target the ZedBoard. Then create a new block design and insert a Zynq PS block. Run the design automation to configure it properly for the Zedboard. You can note now that the DDR settings are correct, and the DRAM training settings are all active. Now export the design to SDK and use it for your petalinux project.

    Sam Bobrowicz
    Digilent Inc.

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