Hello,
I am trying to use DDS in Zynq7000 SoC to generate arbitrary waveform or initial stage any help regarding sine wave generator would be nice. Can anyone please help me how I can configure DDS?
Thank you.
Hello,
I am trying to use DDS in Zynq7000 SoC to generate arbitrary waveform or initial stage any help regarding sine wave generator would be nice. Can anyone please help me how I can configure DDS?
Thank you.
Hello Vatsalnaik,
Are you refering to this? https://www.xilinx.com/products/intellectual-property/dds_compiler.html
If so I am going to suggest you go ask this question over at the Xilinx Forum as they will have more experience with the Xilinx Tool related question.
--Josh
Hi Vatsalnaik,
Also take a look at the Xilinx DDS documentation. It describes the theory of operation and how to configure it.
--Josh