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zynq-7000 gpio pin mapping

Former Member

I am a newbie and having great difficulty in trying to know the gpio pin number.  The hardware and fpga designers have their nomenclature but I need the gpio pin# to use the xgpio bsp code.  How does one translate from say (this is a specific instance):

J15  IO_L4P_T0_34 

or

K15  IO_L4N_T0_34

to the gpio pin number.  Where is the mapping information found.  I have search through the hdf data, include files, ug585 but cannot find the information.

Thanks in advance.

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    Hello,

     

    The short answer is that it depends on what GPIO ports your hardware design assigned to those pins.

     

    Assuming you are using a ZedBoard those two pins are physically connected to J2, the AMS connector. Your hardware design could assign anything it wants to those pins but, assuming you want GPIO, there are two possibilities. Most likely, since you mention xpgio, is that your hardware designer added one or more PL (Programmable Logic) based AXI GPIO ports to your design and connected the GPIO signals to those pins.

     

    The other possibility is that the hardware design is using one of the PS (Processor System) based GPIO ports and has connected the signals to these pins via the 'EMIO' connection to the PL. It that case you would use the xgpiops drivers.

     

    There is a 'constraints' file that is part of the hardware design that assigns each signal connected to an external Zynq connection to a specific pin. You will need to get that information from your hardware designer.

     

    If you would like a better understanding of the Zynq device and the Xilinx tools there are several good resources. The Avnet  Developing Zynq HW and SW Speedway workshops are available to download here:

     

    http://zedboard.org/support/trainings-and-videos

     

    and Adam Taylor has an excellent blog on using the Zynq devices and tools:

     

    http://zedboard.org/content/microzed-chronicles

     

    -Gary

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  • 0

    Hello,

     

    The short answer is that it depends on what GPIO ports your hardware design assigned to those pins.

     

    Assuming you are using a ZedBoard those two pins are physically connected to J2, the AMS connector. Your hardware design could assign anything it wants to those pins but, assuming you want GPIO, there are two possibilities. Most likely, since you mention xpgio, is that your hardware designer added one or more PL (Programmable Logic) based AXI GPIO ports to your design and connected the GPIO signals to those pins.

     

    The other possibility is that the hardware design is using one of the PS (Processor System) based GPIO ports and has connected the signals to these pins via the 'EMIO' connection to the PL. It that case you would use the xgpiops drivers.

     

    There is a 'constraints' file that is part of the hardware design that assigns each signal connected to an external Zynq connection to a specific pin. You will need to get that information from your hardware designer.

     

    If you would like a better understanding of the Zynq device and the Xilinx tools there are several good resources. The Avnet  Developing Zynq HW and SW Speedway workshops are available to download here:

     

    http://zedboard.org/support/trainings-and-videos

     

    and Adam Taylor has an excellent blog on using the Zynq devices and tools:

     

    http://zedboard.org/content/microzed-chronicles

     

    -Gary

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