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MMCM instantiation

zanabonir

Dear Forum

 

how could be possiblee..if possible... to create and connect  and configure a MMCM via VHDL or other code/file, without use the IP CLK WIZARD to add in Block Deisgn ?

Thanks

 

Roberto

  • 0

    Hi there,

    I would suggest that you use the wizard to create the IP.  From there you will have a set of VHDL that you can manipulate as you wish.  I suggest you continue to use the wizard as there are many options, features, settings that should be changed together and the wizard will take care of that for you. 

    Another option would be to generate multiple configurations that you want, then use a diff tool to compare the files to get ALL of the changes that you will need to make in order to get the various configurations that you are intending to use.

    --Dan

  • 0 in reply to drozwood90

    Can you show me a example (without the wizard)....

    If MMCM is to complicated, I'm also curios to know how to instantiate a simple register in FPGA, ...i meand..a specific

    cell in FPGA . Is this possible or Vivado decide all ?

    Or, if you want, I can use the wizard, but I want say to vivado to use  exactly a specific  cell (FF or DSP ...other)  in this phisical position?

    Why seems imortan for me ?

    Because if I look in the implemented design the varios connection, and I dont like one,and i want modify ,I would like

    to be able to modify this.....I know vivado do the best....but we are courios people.

     

    Thanks for reply

    Roberto

    Thanks

  • 0

    Hi there,

    Any example I provide will be generated with a wizard.  As I mentioned, there are just too many things that you need to account for in order to make this work.  It really is not worth the time to try to hand code one.

    To generate a register, you will need to understand the interface.  A register is just a piece of memory.  You can instantiate a piece of BRAM and just interface to that.

    I'm also not sure you want to try to force the use of a specific cell.  You can do this, but Vivado will do a place and route best fit and utilize resources much better than you will be able to - especially if your design changes.  If you have a timing critical thing, you can typically use this mechanism, but again, we are talking a RARE case.  Vivado will do a much better job auto-placing.

    The only reason I would think you would need to hand place and hand code the MMCM is if you were doing Hyper-routing, however I do not think this is the case.  I suppose if your design is too large that could be another case, however proper constraints will take care of these kinds of issues as well.

    If you want to hand route things, you can of course use constraints to lock pieces around, but again, Vivado will perform this job quite well for you and you needn't worry about it.  If you are trying to hand place to try to "fix" a timing issue, your constraints need work, not the end design.  Proper constraints will take care of all but the very fewest of cases (hyper routing, which is certainly not a typical thing to be doing).

    --Dan

  • 0 in reply to drozwood90

    Thanks for reply..

    I know Vivado can do all best than me..As any compiler in C program can do better than man.

    But exist the way to implement by hand a piece of FPGA ? Exist some document..?

                       -If yes, than I will be happy to read...

                       -If not, than no problem.

     

    Thanks again

    Roberto

  • 0

    Hi Roberto,

    What you are looking for is called floor planning, you can find information about it in the two links provided:

    http://www.xilinx.com/support/documentation/sw_manuals/xilinx14_3/Floorplanning_Methodology_Guide.pdf

    https://www.xilinx.com/video/hardware/design-analysis-floorplanning-with-vivado.html

    However it is suggested in most cases to let Vivado take care of this step.

    --Josh

  • 0 in reply to jafoste4

    Thanks for reply

    and as always, for support anyone in this forum.

     

    Roberto