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Storing the bitstream

Former Member

Hi everyone,

If I'm using only the PL part of the board, where and how I can store the bitstream so I don't have to reprogram the board using jtag after each reboot?

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    As described in section 6 of the UG585, the Zynq Technical Ref Manual ( http://www.xilinx.com/support/documentation/user_guides/ug585-Zynq-7000-TRM.pdf  ) the user selectable boot modes are JTAG, Quad-SPI, SD card, NAND Flash, or NOR Flash. Given that you are using the Zed board and want to avoid loading via JTAG each time this means booting from either QSPI Flash or the SD Card. You will need to include a minimal Zynq block in your design with an interface to either the QSPI Flash or the SD Card or both. Then, once you have implemented your design and generated a bitstream, you will need to export the design to SDK and generate a First Stage Boot Loader (FSBL). Then, also in the SDK, you will need to 'Create Zynq Boot Image' targeting your selected memory device that includes at least the FSBL .elf file you just generated  and the bit file for your PL design. Once you have programmed the QSPI Flash or SD Card with the bootable image and set the Zedboard boot configuration jumpers to select the correct boot device it should boot and load your PL bitstream on power up.

     

    - Gary