Hi,
For some reasons I can't get the OBUFDS to work on the zedboard. I have tried several input/output combination but none of them work. IBUFS works fine to convert LVDS input to CMOS output and I get the CMOS output on any pin I want. But when I try to convert the same CMOS or another CMOS signal back to LVDS using OBUFDS, I get no output on FMC or PMOD differential pairs. One of the codes I have tried is as below:
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
library UNISIM;
use UNISIM.VComponents.all;
entity DSINOUT is
Port ( CLK_IN_P : in STD_LOGIC;
CLK_IN_N : in STD_LOGIC;
CLK_OUT_P : out STD_LOGIC;
CLK_OUT_N : out STD_LOGIC;
LD0 : out STD_LOGIC);
end DSINOUT;
architecture data_flow of DSINOUT is
signal clk_lvcmos : STD_LOGIC;
begin
-- LVDS input to internal single
CLK_IBUFDS : IBUFDS
generic map(
IOSTANDARD => "DEFAULT"
)
port map(
I => CLK_IN_P,
IB => CLK_IN_N,
O => clk_lvcmos
);
-- Internal single to LVDS output
CLK_OBUFDS : OBUFDS
generic map(
IOSTANDARD => "DEFAULT"
)
port map(
O => CLK_OUT_P,
OB => CLK_OUT_N,
I => clk_lvcmos
);
end data_flow;
and the UCF file is:
# Input clock differential pair
NET CLK_IN_N LOC = C20 | IOSTANDARD=LVDS_25 | DIFF_TERM = TRUE; # "FMC-LA18_CC_N"
NET CLK_IN_P LOC = D20 | IOSTANDARD=LVDS_25 | DIFF_TERM = TRUE; # "FMC-LA18_CC_P"
# Output clock differential pair
NET CLK_OUT_N LOC = G21 | IOSTANDARD=LVDS_25; # "FMC-LA20_N"
NET CLK_OUT_P LOC = G20 | IOSTANDARD=LVDS_25; # "FMC-LA20_P"
