hi,
im trying to implement a scrambler on Zedboard+fmcomms4 using HDL code's work flow advisor. i designed the scrambler using delay elements and exor gate. the input is given through a bernoulli generator and output to the time scope. when i run the model in simulink i get prefect results but when i implement it on the Zedboard Via HDl work flow advisor i get no errors during the whole process of the work flow but after implementation when i run the hardware i dont get any output.
thank you.
