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PS-RST oddity relating to QSPI boot

Former Member

I'm testing QSPI boot mode using the built-in ZedBoard QSPI Flash contents (which simply turns on every other LED as described in Appendix II of the Getting Started Guide). 

I noticed that after the initial power-on boot-up succeeds at displaying the LED pattern, if you then press the PS-RST button the pattern does not redisplay as expected.  Instead the UART outputs the text "WDT reset happened, falling back...".  There is no UART output for the intial power on. 

Is this failure to respond correctly to a PS-RST a problem relating to the chip itself, the Xilinx base software, or something particular to this demo?

  • 0

    This is particular to this demo.  Asserting PS-RST will also clear the PL.  You should notice that the DONE LED goes out.  The application has to be designed to handle PS-RST to reload the PL, if that is the behavior you want.

     

    Bryan

  • 0

    I thought that the PS_SRST pin (attached to the PS-RST button) on the chip was unconditional?  It should reset everything except for the PLL and strapping.  So my assumption is that the chip is resetting, but something in the subsequent boot sequence is misinterpreting the REBOOT_STATUS register (or perhaps worse the ROM code is not writing this register correctly?).  It is reporting that the watchdog timer went off when that isn't what happened I think.  I'm looking at the TRM page 1452 for the register and Chapter 26 describing the resets BTW.

    I'm just getting started with the board so sorry if this is something obvious.  I just want to make sure that Boot-from-QSPI will react correctly to resets for my own board design in the future.  Is this simply an option to the tools to say what to do in response to  various reset reason codes when the FSBL starts up or is this custom code handling it in the demo application portion (is there even an application here or just a PL image being loaded by FSBL)?

    I see the SD Card Out of the Box (OOB) demo project on the website but I don't see the QSPI Out of the Box demo project there.  That might help answer this question I suppose if the creator would be kind enough to post it.  It may be trivial but it does exercise parts of the board that I'm particularly interested in.  Thanks!

  • 0 in reply to Former Member

    I was pointed to this Xilinx Answer Record via Avnet technical support in case anyone else is looking for resolution of this PS-RST issue:

    http://www.xilinx.com/support/answers/50499.htm

    It sounds like it is a known issue and will be fixed in 14.3.

      - Mike