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Linux + FPGA on the zedboard

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The Zedboard seems very interesting, it has an ARM processor on which a user can run a linux system, it is tightly coupled to an FPGA, and it includes several peripherals and an FMC connector. 

I plan to run linux on the zedboard, and I want to stick the zedboard on a network and access the zedboard remotely using an ethernet connection, will that just work?

OK next, I want to create an FPGA application, I will want to use an external clock, is there an input for that?  I also want to use an external trigger input, do I use the XADC for that?  What is the XADC?

How about moving data back and forth between linux and the FPGA, what will be involved to make that work?

Thanks.



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    Hi piller,

    I'm so glad you are excited about Zynq and the Zedboard as well are!

    Let me try and take your questions on one at a time:

    1.  The ARM portion of the Zynq device is based off of traditional ARM IP, and thus will run Linux natively and support all of the traditional drivers and libraries compiled for ARM that any other A9 ARM processors support.  The Ethernet controller on the the Zynq chip has drivers that are already supported within the Linux kernel, and thus if you would like to interface to an Ethernet connection it is simply just using the Ethernet interface that is available within the /dev directory within Linux (just like any other platform).  So you question of "Will it just work" my answer is: yes, we have full 10BaseT/100BASET/1000BaseT Ethernet support which any Layer-7 application can take full advantage of.

    2a.  There are lots of global clock inputs available to bring an external clock into the Zynq device.  The Zedboard also has this ability brought out to the FMC connector and an oscillator.  You can see this in the Schematic that is posted here: http://zedboard.org/content/documentation

    2b.  Is your external trigger an analog voltage level, or a digital transition?  We can support both.  You can bring in an analog voltage level into our XADC Analog Mixed Signal (AMS) system and set a threshold to trigger a signal internally within FPGA fabric.  If you want to use a digital transition as a signal, that can be done as well using a clock to sample an input pin.

    2c.  The XADC subsystem is Xilinx's offering for bringing in analog signals into the FPGA fabric of the device.  The XADC system provides two ADC's that run at 1MSPS with a bit resolution of 12bits.  There are two mux's available to bring in up to 32 single ended signals or 16 differential signals into the two ADC's.

    3.  The ARM subsystem within the Zynq device uses a standard called AXI to interface with internal peripherals.  The standard of AXI4 is used within the Xilin FPGA fabric to interface with the ARM subsystem.  This allows for a peripheral to be mapped to memory, and a driver to be written within Linux to have that memory area accessible through a /dev device.

    Hope that helps!

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    Hi piller,

    I'm so glad you are excited about Zynq and the Zedboard as well are!

    Let me try and take your questions on one at a time:

    1.  The ARM portion of the Zynq device is based off of traditional ARM IP, and thus will run Linux natively and support all of the traditional drivers and libraries compiled for ARM that any other A9 ARM processors support.  The Ethernet controller on the the Zynq chip has drivers that are already supported within the Linux kernel, and thus if you would like to interface to an Ethernet connection it is simply just using the Ethernet interface that is available within the /dev directory within Linux (just like any other platform).  So you question of "Will it just work" my answer is: yes, we have full 10BaseT/100BASET/1000BaseT Ethernet support which any Layer-7 application can take full advantage of.

    2a.  There are lots of global clock inputs available to bring an external clock into the Zynq device.  The Zedboard also has this ability brought out to the FMC connector and an oscillator.  You can see this in the Schematic that is posted here: http://zedboard.org/content/documentation

    2b.  Is your external trigger an analog voltage level, or a digital transition?  We can support both.  You can bring in an analog voltage level into our XADC Analog Mixed Signal (AMS) system and set a threshold to trigger a signal internally within FPGA fabric.  If you want to use a digital transition as a signal, that can be done as well using a clock to sample an input pin.

    2c.  The XADC subsystem is Xilinx's offering for bringing in analog signals into the FPGA fabric of the device.  The XADC system provides two ADC's that run at 1MSPS with a bit resolution of 12bits.  There are two mux's available to bring in up to 32 single ended signals or 16 differential signals into the two ADC's.

    3.  The ARM subsystem within the Zynq device uses a standard called AXI to interface with internal peripherals.  The standard of AXI4 is used within the Xilin FPGA fabric to interface with the ARM subsystem.  This allows for a peripheral to be mapped to memory, and a driver to be written within Linux to have that memory area accessible through a /dev device.

    Hope that helps!

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