Hello,
I'm inheriting a project that contains a Picozed 7020 board. The previous developers have developed and debugged their bare-metal applications using Xilinx 2016.4 SDK and the Digilent JTAG-HS3 cable. I would like to switch to using Segger JLink instead of the Digilent cable, but the SDK doesn't seem to detect my JLink probe. I was hoping someone would be able to give me some guidance here.
Thanks
