Hello All,
Thought I'd post a quick note regarding my efforts to get the new Avnet network FMC dual ethernet phy card to work with the original zedboard. When I powered up the zedboard with the fmc phy card installed, the fpga would not program (loading from flash). With the fmc phy card removed the zedboard powered up ok. Some googling revealed that the jtag chain is extended onto the fmc card by virtue of the fmc present signal being asserted (pulled low - gnd connection on the phy card) and looking at the phy card schematic showed that a zero ohm resistor on the phy card that would have completed the jtag circuit and allowed TDO to get back to the zedboard was missing. So I added a jumper to the phy card for the missing resistor but the zedboard fpga still would not program on powerup with the phy card installed. I thought that maybe I messed up the jumper soldering (pretty tricky rework at my age with an older and larger soldering iron and almost microscopic resistor land patterns). So since I didn't care about jtag on the phy card I simply removed (carefully) the "present" signal pin from the fmc connector on the phy card. I then verified that the "present" signal on the zedboard was now high (gnd on phy card no longer connected), which should have caused the jtag extension circuit on the zedboard to be turned off, as if the phy card was no longer installed. But the fpga still would not program. So I then went through all the shared pins on the fmc between the two cards and after a lot of cross checking I found that the fpga PS-POR-B signal from the zynq is sent through the fmc, but on this phy card it is tied to the base of a transistor who's emitter is grounded and whose collector connects serially to a "power good" led and a resistor to 3.3v. It appeared to me, through my "somewhat dated" discrete circuit analysis capability, that this would result in the PS-POR-B signal being held one p/n junction from gnd even after the powerup sequence was complete, and that appears to violate the behavior of the signal as per Xilinx documentation. So I disconnected the PS-POR-B signal in the fmc connector by removing that pin as well, and now the zedboard and fmc phy module powerup fine. The "power good" led on the phy card of course is no longer on, but this is not a big deal.
So I'm not sure why I had to go through all this trouble, since the fmc phy card was specified as being compatible with all Xilinx fpga boards that were "LPC FMC compliant. Perhaps I'm just missing something and there was an easier way?? Just thought I'd post this is case someone else is having similar issues. Thanks.
