The J1 pin table (see picture below) shows:
there is SPI_CS0 (fine, works, in "HW mode"), and SPI_CS1 (not possible in "HW mode" - how to use?).
I need a SPI bus with TWO SPI_CSx signals, so: SPI_CS0 and SPI_CS1 (as mentioned in pin table).
BTW:
I guess, there is just one SPI bus possible: I do not see any other pins possible to be used as SPI (only LPSPI4).
Based on the FW (SDK examples):
you can let generate SPI_CS0 (LPSPI_CS0) in "HW mode": this signal is generated when the SPI DMA kicks off and de-asserted when finished (automatically).
All fine.
But if I want to use a second CS signal (this SPI_CS1), for/at the same SPI bus (LPSPI4):
it is not possible:
- to configure and use TWO SPI_CSx signals on the same SPI bus (not possible in driver code)
- to use SPI_CS1 as any HW SPI CS signal:
all the other pin_mux settings for PCS1...PCS3 crash, no way to let drive SPI_CS1 as a "HW mode" signal
Solution:
You have to change to generate the SPI_CSx signals in "SW mode".
It means:
You configure as GPIO Outputs and YOU drive both signals (now also SPI_CS0) by setting it low or high (for/during the SPI transaction).
It works.
But now both SPI_CSx signals must be handled in "SW mode". The "HW mode" (where SPI_CS0 is generated by DMA start and end),
is not usable anymore, it must be handled as a GPIO output as well.
It works.
You can see the implementation here:
tjaekel/MaaXBoard-RT_SPIder: MaaXBoard-RT SPIder framework (github.com)
The MaaXBoard-RT pin assignment table (for signals on J1):
