Using the MicroZed and Python1300c board I'm working to setup the "embv_python1300c_fb" design.
"EMBV - PYTHON-1300-C Reference Design" with guide here:
http://zedboard.org/support/design/4681/46
I've made it to page 8 of the tutorial, having to set version_override = "yes" to enable work with vivado version 2015.
Where the build gets stuck is during license file validation and ip core version comparisons. Any suggestions here?
The tcl script issues a Warning due to licenses not being found which I can confirm are in place with the license manager and set with the tool via XILINXD_LICENSE_FILE variable. Still doing "report_ip_status" shows the Color Filter Array license is not found - even though it's in XILINXD_LICENSE_FILE path (but not in Xilinx.lic, in Xilinx_color_filter_array.lic".
Also Errors are shown for ":ip:v_tpg:6.0".
Here's the tcl shell output:
**************************************************************
****** Vivado v2015.3 (64-bit)
**** SW Build 1368829 on Mon Sep 28 20:06:43 MDT 2015
**** IP Build 1367837 on Mon Sep 28 08:56:14 MDT 2015
** Copyright 1986-2015 Xilinx, Inc. All Rights Reserved.
11/05/15 01:06 AM <DIR> .
11/05/15 01:06 AM <DIR> ..
09/03/15 02:56 PM 0 Add_Scripts_Here.txt
09/03/15 02:56 PM 49,152 gzip.exe
09/03/15 02:56 PM 4,997 idt_clock_bin_2_h.tcl
11/04/15 11:37 PM 14,891 make.tcl
09/03/15 02:56 PM 1,685 makeip.tcl
09/03/15 02:56 PM 1,615 makesampleproject.tcl
09/03/15 02:56 PM 1,623 makesampleproject_working.tcl
09/03/15 02:56 PM 1,988 make_embv_ali3_sharp7.tcl
09/03/15 02:56 PM 1,945 make_embv_hdmi_passthrough.tcl
09/03/15 02:56 PM 1,752 make_embv_python1300c_fb.tcl
09/03/15 02:56 PM 1,745 make_embv_tcm.tcl
09/03/15 02:56 PM 1,954 make_fmchc_factest.tcl
09/03/15 02:56 PM 2,188 make_fmchc_python1300c.tcl
09/03/15 02:56 PM 2,159 make_fmc_imageon_gs.tcl
09/03/15 02:56 PM 2,003 make_microzed_iocc_ali3_sharp7.tcl
09/03/15 02:56 PM 1,932 make_mitx_ali3_sharp7.tcl
09/03/15 02:56 PM 1,995 make_mz_fmccc_ali3_sharp7.tcl
09/03/15 02:56 PM 1,772 make_pzsdr_python1300c.tcl
09/03/15 02:56 PM 1,694 make_zedboard_ali3_sharp7.tcl
09/03/15 02:56 PM <DIR> ProjectScripts
09/03/15 02:56 PM 8,820 tag.tcl
09/03/15 02:56 PM 114,688 tar.exe
21 File(s) 220,598 bytes
3 Dir(s) 11,266,121,728 bytes free
Vivado% source ./make_embv_python1300c_fb.tcl
# set argv [list board=MZ7020_EMBV project=embv_python1300c_fb sdk=yes]
# set argc [llength $argv]
# source ./make.tcl -notrace
*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*
*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*
*- -*
*- Welcome to the Avnet Project Builder -*
*- -*
*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*
*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*
+------------------+------------------------------------+
| Setting | Configuration |
+------------------+------------------------------------+
| Board | MZ7020_EMBV |
+------------------+------------------------------------+
| Project | embv_python1300c_fb |
+------------------+------------------------------------+
| SDK | yes |
+------------------+------------------------------------+
Overriding Version Check, Please Check the Design for Validity!
*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*
Selected Board and Project as:
MZ7020_EMBV and embv_python1300c_fb
*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*
Not Requesting Tag
Setting Up Project embv_python1300c_fb...
***** Generating IP...
***** Creating Vivado Project...
***** Updating Vivado to include IP Folder
INFO: [IP_Flow 19-234] Refreshing IP repositories
INFO: [IP_Flow 19-1700] Loaded user IP repository 'c:/Avnet/hdl/IP'.
INFO: [IP_Flow 19-2313] Loaded Vivado IP repository 'C:/Xilinx/Vivado/2015.3/dat
a/ip'.
***** Creating Block Design...
Wrote : <C:/Avnet/hdl/Projects/embv_python1300c_fb/MZ7020_EMBV/embv_python1300c
_fb.srcs/sources_1/bd/embv_python1300c_fb/embv_python1300c_fb.bd>
***** General Configuration for Design...
***** Check for Video IP core licenses...
WARNING: [IP_Flow 19-2162] IP 'embv_python1300c_fb_v_cfa_0_0' is locked:
* IP 'embv_python1300c_fb_v_cfa_0_0' requires one or more mandatory licenses but
no valid licenses were found. However license checkpoints may prevent use of th
is IP in some tool flows.
Please select 'Report IP Status' from the 'Tools/Report' menu or run Tcl command
'report_ip_status' for more information.
ERROR: [BD 5-216] VLNV <xilinx.com:ip:v_tpg:6.0> is not supported for the curren
t part. The latest supported version for this part is:7.0
ERROR: [Common 17-39] 'create_bd_cell' failed due to earlier errors.
Vivado% report_ip_status
Copyright 1986-2015 Xilinx, Inc. All Rights Reserved.
--------------------------------------------------------------------------------
----
| Tool Version : Vivado v.2015.3 (win64) Build 1368829 Mon Sep 28 20:06:43 MDT 2
015
| Date : Thu Nov 05 01:58:06 2015
| Host : WinSelena running 64-bit major release (build 9200)
| Command : report_ip_status
--------------------------------------------------------------------------------
----
IP Status Summary
1. Project IP Status
--------------------
Your project uses 6 IP. Some of these IP may have undergone changes in this rele
ase of the software. Please review the recommended actions.
More information on the Xilinx versioning policy is available at www.xilinx.com.
Required license was not found.
XILINXD_LICENSE_FILE = C:licensesXilinx.lic; C:licensesXilinx_colorfilterarr
ay.lic; C:licensesXilinx_MicroZed.lic; C:licensesXilinx_video_image_eval.lic
LM_LICENSE_FILE not set
For license installation help, visit
www.xilinx.com/ipcenter/ip_license/ip_licensing_help.htm
Project IP Instances
+--------------------------------------------+----------------------+-----------
----------+-----------+--------------------+---------+--------------+-----------
-+----------------------+
| Instance Name | Status | Recommenda
tion | Change | IP Name | IP | New Version | New
| Original Part |
| | |
| Log | | Version | | License
| |
+--------------------------------------------+----------------------+-----------
----------+-----------+--------------------+---------+--------------+-----------
-+----------------------+
| embv_python1300c_fb_processing_system7_0_0 | Up-to-date | No changes
required | *(1) | ZYNQ7 Processing | 5.5 | 5.5 (Rev. 3) | Included
| xc7z020clg400-1 |
| | |
| | System | (Rev. | |
| |
| | |
| | | 3) | |
| |
+--------------------------------------------+----------------------+-----------
----------+-----------+--------------------+---------+--------------+-----------
-+----------------------+
| embv_python1300c_fb_v_cfa_0_0 | IP license not found | Check IP l
icense | *(2) | Color Filter Array | 7.0 | 7.0 (Rev. 7) | Needs
| xc7z020clg400-1 |
| | |
| | Interpolation | (Rev. | | Purchase
| |
| | |
| | | 7) | |
| |
+--------------------------------------------+----------------------+-----------
----------+-----------+--------------------+---------+--------------+-----------
-+----------------------+
| embv_python1300c_fb_v_cresample_0_0 | Up-to-date | No changes
required | *(3) | Chroma Resampler | 4.0 | 4.0 (Rev. 7) | Design_Lin
| xc7z020clg400-1 |
| | |
| | | (Rev. | |
| |
| | |
| | | 7) | |
| |
+--------------------------------------------+----------------------+-----------
----------+-----------+--------------------+---------+--------------+-----------
-+----------------------+
| embv_python1300c_fb_v_osd_0_0 | Up-to-date | No changes
required | *(4) | Video On Screen | 6.0 | 6.0 (Rev. 9) | Design_Lin
| xc7z020clg400-1 |
| | |
| | Display | (Rev. | |
| |
| | |
| | | 9) | |
| |
+--------------------------------------------+----------------------+-----------
----------+-----------+--------------------+---------+--------------+-----------
-+----------------------+
| embv_python1300c_fb_v_rgb2ycrcb_0_0 | Up-to-date | No changes
required | *(5) | RGB to YCrCb | 7.1 | 7.1 (Rev. 6) | Included
| xc7z020clg400-1 |
| | |
| | Color-Space | (Rev. | |
| |
| | |
| | Converter | 6) | |
| |
+--------------------------------------------+----------------------+-----------
----------+-----------+--------------------+---------+--------------+-----------
-+----------------------+
| embv_python1300c_fb_v_tc_0_0 | Up-to-date | No changes
required | *(6) | Video Timing | 6.1 | 6.1 (Rev. 6) | Included
| xc7z020clg400-1 |
| | |
| | Controller | (Rev. | |
| |
| | |
| | | 6) | |
| |
+--------------------------------------------+----------------------+-----------
----------+-----------+--------------------+---------+--------------+-----------
-+----------------------+
*(1) c:/Xilinx/Vivado/2015.3/data/ip/xilinx/processing_system7_v5_5/doc/processi
ng_system7_v5_5_changelog.txt
*(2) c:/Xilinx/Vivado/2015.3/data/ip/xilinx/v_cfa_v7_0/doc/v_cfa_v7_0_changelog.
txt
*(3) c:/Xilinx/Vivado/2015.3/data/ip/xilinx/v_cresample_v4_0/doc/v_cresample_v4_
0_changelog.txt
*(4) c:/Xilinx/Vivado/2015.3/data/ip/xilinx/v_osd_v6_0/doc/v_osd_v6_0_changelog.
txt
*(5) c:/Xilinx/Vivado/2015.3/data/ip/xilinx/v_rgb2ycrcb_v7_1/doc/v_rgb2ycrcb_v7_
1_changelog.txt
*(6) c:/Xilinx/Vivado/2015.3/data/ip/xilinx/v_tc_v6_1/doc/v_tc_v6_1_changelog.tx
t
Vivado%
