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MicroZed Hardware Design MicroZed + FMC-CC + FMC module, mixed LVDS_25 and LVCMOS18
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MicroZed + FMC-CC + FMC module, mixed LVDS_25 and LVCMOS18

solsen
solsen over 8 years ago

Hello!

I am developing with a MicroZed 7020, a FMC-CC and a ADC plugged in to the carrier card. My problem is this:

The FMC module is controlled with SPI, 1.8V signalling. The data from the module is sent over LVDS at 1.8V offset.

Both interfaces have signals going to both bank 34 and 35 on the Zynq.

Now, because these banks are HR (high-range, ironically) I cannot use the LVDS I/O standard (1.8V). However, I believe I can set the I/O standard to LVDS_25 while VCCIO is 1.8V for each bank, as long as DIFF_TERM is disabled. (UG497 p.100)

However, this means I have to have external differential termination.

So, my 2 questions:

1: What is the best way to provide such termination? Has AVnet provided any convenient sites to solder terminating resistors on either the MicroZed or FMC-CC?

2: Can I flip the problem around, i.e. specify 2.5V VCCIO, LVDS_25 and enable DIFF_TERM for the differential inputs, while the signal levels are physically 1.8V? Will the LVCMOS18 inputs still work? Could it damage anything?

Kind regards,

Snorre

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  • drozwood90
    0 drozwood90 over 8 years ago

    Hi there,

    As far as I recall, there are no such locations as this can cause noise.  You can take a look at the hardware design documentation as well as the layout documentation located on the microzed.org website.
    http://microzed.org/support/documentation/1519

    You should always match the voltage that you are telling the tool you are setting this to.

    Take a look at this forum post regarding your second question.
    https://forums.xilinx.com/t5/Spartan-Family-FPGAs/What-happens-if-the-bank-vcc-voltage-differs-from-the-pins/td-p/367975

    --Dan

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  • solsen
    0 solsen over 8 years ago in reply to drozwood90

    Hi Dan, and thank you for the prompt response. 

    I worked around this problem by enabling internal termination on the ADC board. This feature is intended to limit reflections in the signal path, and automatically doubles the output drive current of the LVDS drivers. Therefore, I programmed the current to 1.75mA instead of 3.5mA before turning on the termination. Hackish, but seems to work (I am still not getting perfect data readouts but I think this is related to my ADC interface).

     

    Thanks again,

    Snorre

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