I am looking to transfer data from the zynq ddr to a custom ip, then store the result on the sd card. The sd card is connected through the emio pin, so it is available to the PL. So far, I can access the DDR from Windows, so I put files there. All I need is to connect each component in vhdl to send and receive data from each other. My current Block diagram has AXI stream FIFo, AXI DMA, BRAM generator, and BRAM controller. I've read different tutorials, and only find how to set up the hardware, but not how to connect each piece. Any ideas?
