Actions
Forum Thread Details
  • State Not Answered
  • Replies 1 reply
  • Subscribers 362 subscribers
  • Views 596 views
  • Users 0 members are here
Related

MicroZed Synthesis errors

e14 Contributor

Hello.  I am synthesizing the MicroZed Basic System reference design using Vivado 2013.4.  I get a ton of warnings about stuff not being driven for DDR and ENET0.  Below are a couple of them.  Is this an issue or is it just because those nets are not actually part of the PL and Vivado gets confused?

[Synth 8-3848] Net ENET0_GMII_TX_EN in module/entity processing_system7_v5_3_processing_system7 does not have driver.

[Synth 8-4446] all outputs are unconnected for this instance and logic may be removed.

The last one is related to this auto generated code in the wrapper for the Zynq.

generate
for (i=0; i < 15; i=i+1) begin
  BIBUF DDR_Addr_BIBUF (.PAD(DDR_Addr[i]),     .IO(buffered_DDR_Addr[i]));
end
endgenerate

  • 0

    The warning you have listed, "[Synth 8-3848] Net ENET0_GMII_TX_EN in module/entity processing_system7_v5_3_processing_system7 does not have driver." is accurate since you are not connecting anything to the GMII ports to the Ethernet block. The default Ethernet interface is the RGMII interface via the MIO pins. There are lots of options within the Processor Section to connect via both the MIO and EMIO and you will always be selecting a subset of them. The warnings you are receiving here are probably just letting you know about the ones you are not using.

     

    I think you should be OK to continue and implement your design.

     

    -Gary