Hello,
I have changing my devicetree because i change my PL configuration. I used device Tree generator on Xilinx SDK. then i replace my file devicetree.dtb.
Now my prompt is fixed to starting kernel...
Do you have any idea to help me.
********** My prompt **********
Memory: ECC disabled
DRAM: 512 MiB
WARNING: Caches not enabled
MMC: zynq_sdhci: 0
SF: Detected S25FL129P_64K with page size 64 KiB, total 16 MiB
*** Warning - bad CRC, using default environment
In: serial
Out: serial
Err: serial
Net: Gem.e000b000
Hit any key to stop autoboot: 0
Copying Linux kernel from SD to RAM...RFS in ext4
Device: zynq_sdhci
Manufacturer ID: 2
OEM: 544d
Name: SA04G
Tran Speed: 50000000
Rd Block Len: 512
SD version 3.0
High Capacity: Yes
Capacity: 3.6 GiB
Bus Width: 4-bit
reading uImage
3241416 bytes read in 505 ms (6.1 MiB/s)
reading devicetree.dtb
7740 bytes read in 14 ms (539.1 KiB/s)
## Booting kernel from Legacy Image at 03000000 ...
Image Name: Linux-3.6.0-xilinx-00003-g174959
Image Type: ARM Linux Kernel Image (uncompressed)
Data Size: 3241352 Bytes = 3.1 MiB
Load Address: 00008000
Entry Point: 00008000
Verifying Checksum ... OK
## Flattened Device Tree blob at 02a00000
Booting using the fdt blob at 0x02a00000
Loading Kernel Image ... OK
OK
Loading Device Tree to 1fb4f000, end 1fb53e3b ... OK
Starting kernel ...
************ devicetree.dts ************
/dts-v1/;
/ {
t#address-cells = <1>;
t#size-cells = <1>;
tcompatible = "xlnx,zynq-7000";
tmodel = "Xilinx Zynq";
taliases {
ttethernet0 = &ps7_ethernet_0;
ttserial0 = &ps7_uart_1;
ttspi0 = &ps7_qspi_0;
t} ;
tchosen {
ttbootargs = "console=ttyPS0,115200 root=/dev/mmcblk0p2 rw earlyprintk rootfstype=ext4 rootwait devtmpfs.mount=0 mem=800M";
ttlinux,stdout-path = "/amba@0/serial@e0001000";
t} ;
tcpus {
tt#address-cells = <1>;
tt#size-cells = <0>;
ttps7_cortexa9_0: cpu@0 {
tttbus-handle = <&ps7_axi_interconnect_0>;
tttcompatible = "arm,cortex-a9";
tttd-cache-line-size = <0x20>;
tttd-cache-size = <0x8000>;
tttdevice_type = "cpu";
ttti-cache-line-size = <0x20>;
ttti-cache-size = <0x8000>;
tttinterrupt-handle = <&ps7_scugic_0>;
tttreg = <0x0>;
tt} ;
ttps7_cortexa9_1: cpu@1 {
tttbus-handle = <&ps7_axi_interconnect_0>;
tttcompatible = "arm,cortex-a9";
tttd-cache-line-size = <0x20>;
tttd-cache-size = <0x8000>;
tttdevice_type = "cpu";
ttti-cache-line-size = <0x20>;
ttti-cache-size = <0x8000>;
tttinterrupt-handle = <&ps7_scugic_0>;
tttreg = <0x1>;
tt} ;
t} ;
tpmu {
ttcompatible = "arm,cortex-a9-pmu";
ttinterrupt-parent = <&ps7_scugic_0>;
ttinterrupts = <0 5 4>, <0 6 4>;
ttreg = <0xf8891000 0x1000>, <0xf8893000 0x1000>;
ttreg-names = "cpu0", "cpu1";
t} ;
tps7_ddr_0: memory@0 {
ttdevice_type = "memory";
ttreg = <0x0 0x40000000>;
t} ;
tps7_axi_interconnect_0: amba@0 {
tt#address-cells = <1>;
tt#size-cells = <1>;
ttcompatible = "xlnx,ps7-axi-interconnect-1.00.a", "simple-bus";
ttranges ;
ttps7_afi_0: ps7-afi@f8008000 {
tttcompatible = "xlnx,ps7-afi-1.00.a";
tttreg = <0xf8008000 0x1000>;
tt} ;
ttps7_afi_1: ps7-afi@f8009000 {
tttcompatible = "xlnx,ps7-afi-1.00.a";
tttreg = <0xf8009000 0x1000>;
tt} ;
ttps7_afi_2: ps7-afi@f800a000 {
tttcompatible = "xlnx,ps7-afi-1.00.a";
tttreg = <0xf800a000 0x1000>;
tt} ;
ttps7_afi_3: ps7-afi@f800b000 {
tttcompatible = "xlnx,ps7-afi-1.00.a";
tttreg = <0xf800b000 0x1000>;
tt} ;
ttps7_coresight_comp_0: ps7-coresight-comp@f8800000 {
tttcompatible = "xlnx,ps7-coresight-comp-1.00.a";
tttreg = <0xf8800000 0x100000>;
tt} ;
ttps7_ddrc_0: ps7-ddrc@f8006000 {
tttcompatible = "xlnx,ps7-ddrc-1.00.a", "xlnx,ps7-ddrc";
tttreg = <0xf8006000 0x1000>;
tttxlnx,has-ecc = <0x0>;
tt} ;
ttps7_dev_cfg_0: ps7-dev-cfg@f8007000 {
tttclock-names = "ref_clk", "fclk0", "fclk1", "fclk2", "fclk3";
tttclocks = <&clkc 12>, <&clkc 15>, <&clkc 16>, <&clkc 17>, <&clkc 18>;
tttcompatible = "xlnx,ps7-dev-cfg-1.00.a";
tttinterrupt-parent = <&ps7_scugic_0>;
tttinterrupts = <0 8 4>;
tttreg = <0xf8007000 0x100>;
tt} ;
ttps7_dma_s: ps7-dma@f8003000 {
ttt#dma-cells = <1>;
ttt#dma-channels = <8>;
ttt#dma-requests = <4>;
tttarm,primecell-periphid = <0x41330>;
tttclock-names = "apb_pclk";
tttclocks = <&clkc 27>;
tttcompatible = "xlnx,ps7-dma-1.00.a", "arm,primecell", "arm,pl330";
tttinterrupt-names = "abort", "dma0", "dma1", "dma2", "dma3",
tttt"dma4", "dma5", "dma6", "dma7";
tttinterrupt-parent = <&ps7_scugic_0>;
tttinterrupts = <0 13 4>, <0 14 4>, <0 15 4>, <0 16 4>, <0 17 4>, <0 40 4>, <0 41 4>, <0 42 4>, <0 43 4>;
tttreg = <0xf8003000 0x1000>;
tt} ;
ttps7_ethernet_0: ps7-ethernet@e000b000 {
ttt#address-cells = <1>;
ttt#size-cells = <0>;
tttclock-names = "ref_clk", "aper_clk";
tttclocks = <&clkc 13>, <&clkc 30>;
tttcompatible = "xlnx,ps7-ethernet-1.00.a";
tttinterrupt-parent = <&ps7_scugic_0>;
tttinterrupts = <0 22 4>;
tttlocal-mac-address = [00 0a 35 00 00 00];
tttphy-handle = <&phy0>;
tttphy-mode = "rgmii-id";
tttreg = <0xe000b000 0x1000>;
tttxlnx,enet-reset = "";
tttxlnx,eth-mode = <0x1>;
tttxlnx,has-mdio = <0x1>;
tttxlnx,ptp-enet-clock = <111111115>;
tttmdio {
tttt#address-cells = <1>;
tttt#size-cells = <0>;
ttttphy0: phy@7 {
tttttcompatible = "marvell,88e1116r";
tttttdevice_type = "ethernet-phy";
tttttreg = <7>;
tttt} ;
ttt} ;
tt} ;
ttps7_globaltimer_0: ps7-globaltimer@f8f00200 {
tttcompatible = "xlnx,ps7-globaltimer-1.00.a";
tttreg = <0xf8f00200 0x100>;
tt} ;
ttps7_gpio_0: ps7-gpio@e000a000 {
ttt#gpio-cells = <2>;
tttclocks = <&clkc 42>;
tttcompatible = "xlnx,ps7-gpio-1.00.a";
tttemio-gpio-width = <64>;
tttgpio-controller ;
tttgpio-mask-high = <0x0>;
tttgpio-mask-low = <0x5600>;
tttinterrupt-parent = <&ps7_scugic_0>;
tttinterrupts = <0 20 4>;
tttreg = <0xe000a000 0x1000>;
tt} ;
ttps7_gpv_0: ps7-gpv@f8900000 {
tttcompatible = "xlnx,ps7-gpv-1.00.a";
tttreg = <0xf8900000 0x100000>;
tt} ;
ttps7_intc_dist_0: ps7-intc-dist@f8f01000 {
tttcompatible = "xlnx,ps7-intc-dist-1.00.a";
tttreg = <0xf8f01000 0x1000>;
tt} ;
ttps7_iop_bus_config_0: ps7-iop-bus-config@e0200000 {
tttcompatible = "xlnx,ps7-iop-bus-config-1.00.a";
tttreg = <0xe0200000 0x1000>;
tt} ;
ttps7_l2cachec_0: ps7-l2cachec@f8f02000 {
tttcompatible = "xlnx,ps7-l2cachec-1.00.a";
tttreg = <0xf8f02000 0x1000>;
tt} ;
ttps7_ocmc_0: ps7-ocmc@f800c000 {
tttcompatible = "xlnx,ps7-ocmc-1.00.a";
tttreg = <0xf800c000 0x1000>;
tt} ;
ttps7_pl310_0: ps7-pl310@f8f02000 {
tttarm,data-latency = <3 2 2>;
tttarm,tag-latency = <2 2 2>;
tttcache-level = <2>;
tttcache-unified ;
tttcompatible = "xlnx,ps7-pl310-1.00.a", "arm,pl310-cache";
tttinterrupt-parent = <&ps7_scugic_0>;
tttinterrupts = <0 2 4>;
tttreg = <0xf8f02000 0x1000>;
tt} ;
ttps7_qspi_0: ps7-qspi@e000d000 {
tttclock-names = "ref_clk", "aper_clk";
tttclocks = <&clkc 10>, <&clkc 43>;
tttcompatible = "xlnx,ps7-qspi-1.00.a";
tttinterrupt-parent = <&ps7_scugic_0>;
tttinterrupts = <0 19 4>;
tttis-dual = <0>;
tttnum-chip-select = <1>;
tttreg = <0xe000d000 0x1000>;
tttxlnx,fb-clk = <0x0>;
tttxlnx,qspi-mode = <0x0>;
tt} ;
ttps7_qspi_linear_0: ps7-qspi-linear@fc000000 {
tttclock-names = "ref_clk", "aper_clk";
tttclocks = <&clkc 10>, <&clkc 43>;
tttcompatible = "xlnx,ps7-qspi-linear-1.00.a";
tttreg = <0xfc000000 0x1000000>;
tt} ;
ttps7_ram_0: ps7-ram@0 {
tttcompatible = "xlnx,ps7-ram-1.00.a", "xlnx,ps7-ocm";
tttinterrupt-parent = <&ps7_scugic_0>;
tttinterrupts = <0 3 4>;
tttreg = <0xfffc0000 0x40000>;
tt} ;
ttps7_scuc_0: ps7-scuc@f8f00000 {
tttcompatible = "xlnx,ps7-scuc-1.00.a";
tttreg = <0xf8f00000 0xfd>;
tt} ;
ttps7_scugic_0: ps7-scugic@f8f01000 {
ttt#address-cells = <2>;
ttt#interrupt-cells = <3>;
ttt#size-cells = <1>;
tttcompatible = "xlnx,ps7-scugic-1.00.a", "arm,cortex-a9-gic", "arm,gic";
tttinterrupt-controller ;
tttnum_cpus = <2>;
tttnum_interrupts = <96>;
tttreg = <0xf8f01000 0x1000>, <0xf8f00100 0x100>;
tt} ;
ttps7_scutimer_0: ps7-scutimer@f8f00600 {
tttclocks = <&clkc 4>;
tttcompatible = "xlnx,ps7-scutimer-1.00.a", "arm,cortex-a9-twd-timer";
tttinterrupt-parent = <&ps7_scugic_0>;
tttinterrupts = <1 13 0x301>;
tttreg = <0xf8f00600 0x20>;
tt} ;
ttps7_scuwdt_0: ps7-scuwdt@f8f00620 {
tttclocks = <&clkc 4>;
tttcompatible = "xlnx,ps7-scuwdt-1.00.a";
tttdevice_type = "watchdog";
tttinterrupt-parent = <&ps7_scugic_0>;
tttinterrupts = <1 14 0x301>;
tttreg = <0xf8f00620 0xe0>;
tt} ;
ttps7_sd_0: ps7-sdio@e0100000 {
tttclock-frequency = <50000000>;
tttclock-names = "ref_clk", "aper_clk";
tttclocks = <&clkc 21>, <&clkc 32>;
tttcompatible = "xlnx,ps7-sdio-1.00.a", "generic-sdhci", "arasan,sdhci";
tttinterrupt-parent = <&ps7_scugic_0>;
tttinterrupts = <0 24 4>;
tttreg = <0xe0100000 0x1000>;
tttxlnx,has-cd = <0x1>;
tttxlnx,has-power = <0x0>;
tttxlnx,has-wp = <0x1>;
tt} ;
ttps7_slcr_0: ps7-slcr@f8000000 {
tttcompatible = "xlnx,ps7-slcr-1.00.a", "xlnx,zynq-slcr";
tttreg = <0xf8000000 0x1000>;
tttclocks {
tttt#address-cells = <1>;
tttt#size-cells = <0>;
ttttclkc: clkc {
ttttt#clock-cells = <1>;
tttttclock-output-names = "armpll", "ddrpll", "iopll", "cpu_6or4x", "cpu_3or2x",
tttttt"cpu_2x", "cpu_1x", "ddr2x", "ddr3x", "dci",
tttttt"lqspi", "smc", "pcap", "gem0", "gem1",
tttttt"fclk0", "fclk1", "fclk2", "fclk3", "can0",
tttttt"can1", "sdio0", "sdio1", "uart0", "uart1",
tttttt"spi0", "spi1", "dma", "usb0_aper", "usb1_aper",
tttttt"gem0_aper", "gem1_aper", "sdio0_aper", "sdio1_aper", "spi0_aper",
tttttt"spi1_aper", "can0_aper", "can1_aper", "i2c0_aper", "i2c1_aper",
tttttt"uart0_aper", "uart1_aper", "gpio_aper", "lqspi_aper", "smc_aper",
tttttt"swdt", "dbg_trc", "dbg_apb";
tttttcompatible = "xlnx,ps7-clkc";
tttttfclk-enable = <0xf>;
tttttps-clk-frequency = <33333333>;
tttt} ;
ttt} ;
tt} ;
ttps7_ttc_0: ps7-ttc@f8001000 {
tttclocks = <&clkc 6>;
tttcompatible = "xlnx,ps7-ttc-1.00.a", "cdns,ttc";
tttinterrupt-names = "ttc0", "ttc1", "ttc2";
tttinterrupt-parent = <&ps7_scugic_0>;
tttinterrupts = <0 10 4>, <0 11 4>, <0 12 4>;
tttreg = <0xf8001000 0x1000>;
tt} ;
ttps7_uart_1: serial@e0001000 {
tttclock-names = "ref_clk", "aper_clk";
tttclocks = <&clkc 24>, <&clkc 41>;
tttcompatible = "xlnx,ps7-uart-1.00.a", "xlnx,xuartps";
tttcurrent-speed = <115200>;
tttdevice_type = "serial";
tttinterrupt-parent = <&ps7_scugic_0>;
tttinterrupts = <0 50 4>;
tttport-number = <0>;
tttreg = <0xe0001000 0x1000>;
tttxlnx,has-modem = <0x0>;
tt} ;
ttps7_usb_0: ps7-usb@e0002000 {
tttclocks = <&clkc 28>;
tttcompatible = "xlnx,ps7-usb-1.00.a";
tttdr_mode = "host";
tttinterrupt-parent = <&ps7_scugic_0>;
tttinterrupts = <0 21 4>;
tttphy_type = "ulpi";
tttreg = <0xe0002000 0x1000>;
tttusb-reset = <&ps7_gpio_0 7 0>;
tt} ;
ttps7_xadc: ps7-xadc@f8007100 {
tttclocks = <&clkc 12>;
tttcompatible = "xlnx,ps7-xadc-1.00.a";
tttinterrupt-parent = <&ps7_scugic_0>;
tttinterrupts = <0 7 4>;
tttreg = <0xf8007100 0x20>;
tt} ;
t} ;
} ;
