I'm trying to build a custom IP with axi stream to send the data to DMA-> DDR3 memory.
Vivado 2014.1 used.
Custom ip with axi stream created by CIP in vivado. Signal "tkeep" has been added, and set to "1111".
I revised referece dma C code from xilinx to test the data receiving from DMA.
It's supposed to receive 8 32bit width from custom IP. In the first loop, it received some data, but not right.
The correct data should be like: 0xF3D2BA11, 0xF3D2BA12, 0xF3D2BA13, 0xF3D2BA15..........
After 1st loop, dma s2mm receiving failed.
I have two questions:
1). In the first loop, it seems the app received part of the data from my custom ip, but not all the data. Why?
2) Why it failed after 2nd loop?
I've been working on this for 2 weeks, but counld make it right. Really very frustrated!!!!
Please take a look at my project and help me out!!!!!
Appreciate it very much.
hereby download link for the vivado project and SDK project in a zip file.