CDMA to DDR (UG873 Guide)

I am using this guide (chapter 6) to figure out how to use AXI CDMA to transfer data to and from DDR. The problem is this guide is using EDK and I am using vivado 2014.2. I am on one of the last steps with creating my block diagram, but according to the guide, M_AXI on the AXI CDMA is connected to both S_AXI_HP0 and S_AXI_HP2, which I do not believe is correct and I do not know how to make that connection.

If anyone knows what I need to do in order to fix this, please let me know.

Thanks,
Zach

0 bhfletcher over 10 years ago

Unfortunately, I don't know the answer to your question. Since this is a Xilinx document, you should also post this on the Xilinx forums.
http://forums.xilinx.com/

Bryan
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0 Former Member over 10 years ago

Thanks for your response, I just posted on that forum so between both let's hope I can get an answer

Zach
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0 Former Member over 10 years ago

The solution is to just use 1 slave interface and 2 master interfaces in order to connect to S_AXI_HP0 and S_AXI_HP2.
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0 Former Member over 10 years ago in reply to Former Member

Please find below the diagram of the configuration I used:
https://drive.google.com/file/d/0Bxyv6KTPN_xAdHNBTzFGNkZwWVU/edit?usp=sharing

You set S_AXI HP0 and HP2 in Zynq customize IP - PS-PL Configuration - HP Slave AXI Interface

Also I found Mohammad's videos most helpful to get a headstart with AXI:
http://www.googoolia.com/wp/category/zynq-training/
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0 Former Member over 10 years ago

found some nice Xilinx AXI DMA examples:

http://forums.xilinx.com/t5/Zynq-All-Programmable-SoC/AXI-DMA-Data-to-DDR3-Memory/m-p/463292/highlight/true#M2311

work under Vivado 2014.2 after some slight modifications (didn't try dma_sim though since it requires a AXI BFM core license)
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