I am trying to configure the PMOD connector J5 as a SPI interface for acquiring signals from outside. I ran into a couple of issues.
1. No Vivado document exists for explaining how to setup/initialize this interface. Does anyone know of a PMOD interface setup example with the MicroZed board?
2. I started with a sample Zedboard project in Planahead and followed the steps there to create a new PlanAhead project with the MicroZed board. The PlanAhead project fails when implementing the design:
My ucf file:
NET "led[0]" LOC = B14;
NET "led[0]" IOSTANDARD = LVCMOS33;
NET "processing_system7_0_SPI1_MISO_pin" LOC = C6;
NET "processing_system7_0_SPI1_MOSI_pin" LOC = E9;
NET "processing_system7_0_SPI1_SCLK_pin" LOC = D9;
NET "processing_system7_0_SPI1_SS1_O_pin" LOC = E8;
NET "processing_system7_0_SPI1_SS2_O_pin" LOC = B5;
NET "processing_system7_0_SPI1_SS_pin" LOC = E6;
NET "processing_system7_0_SPI1_MISO_pin" IOSTANDARD = LVCMOS33;
NET "processing_system7_0_SPI1_MOSI_pin" IOSTANDARD = LVCMOS33;
NET "processing_system7_0_SPI1_SCLK_pin" IOSTANDARD = LVCMOS33;
NET "processing_system7_0_SPI1_SS1_O_pin" IOSTANDARD = LVCMOS33;
NET "processing_system7_0_SPI1_SS2_O_pin" IOSTANDARD = LVCMOS33;
NET "processing_system7_0_SPI1_SS_pin" IOSTANDARD = LVCMOS33;
Errors:
PlanAhead Commands
launch_runs impl_1 -to_step Bitgen
[Constraints 18-5] Cannot loc terminal 'led[0]' at site B14, Site location is not valid ["D:/Mzed_projects/maxref3pa/maxref3pa.srcs/constrs_1/new/arm_system_stub.ucf":1]
[Constraints 18-5] Cannot loc terminal 'processing_system7_0_SPI1_MISO_pin' at site C6, Site location is not valid ["D:/Mzed_projects/maxref3pa/maxref3pa.srcs/constrs_1/new/arm_system_stub.ucf":5]
[Constraints 18-5] Cannot loc terminal 'processing_system7_0_SPI1_MOSI_pin' at site E9, Site location is not valid ["D:/Mzed_projects/maxref3pa/maxref3pa.srcs/constrs_1/new/arm_system_stub.ucf":6]
[Constraints 18-5] Cannot loc terminal 'processing_system7_0_SPI1_SCLK_pin' at site D9, Site location is not valid ["D:/Mzed_projects/maxref3pa/maxref3pa.srcs/constrs_1/new/arm_system_stub.ucf":7]
[Constraints 18-5] Cannot loc terminal 'processing_system7_0_SPI1_SS1_O_pin' at site E8, Illegal to place instance processing_system7_0_SPI1_SS1_O_pin_OBUF on site E8. The location site type doe not match the instance type. Instance processing_system7_0_SPI1_SS1_O_pin_OBUF belongs to a shape with reference instance processing_system7_0_SPI1_SS1_O_pin_OBUF. Shape elements have relative placement respect to each other. The invalid location might results from a constraint on any of the instance in the shape. ["D:/Mzed_projects/maxref3pa/maxref3pa.srcs/constrs_1/new/arm_system_stub.ucf":8]
[Constraints 18-5] Cannot loc terminal 'processing_system7_0_SPI1_SS2_O_pin' at site B5, Illegal to place instance processing_system7_0_SPI1_SS2_O_pin_OBUF on site B5. The location site type doe not match the instance type. Instance processing_system7_0_SPI1_SS2_O_pin_OBUF belongs to a shape with reference instance processing_system7_0_SPI1_SS2_O_pin_OBUF. Shape elements have relative placement respect to each other. The invalid location might results from a constraint on any of the instance in the shape. ["D:/Mzed_projects/maxref3pa/maxref3pa.srcs/constrs_1/new/arm_system_stub.ucf":9]
[Constraints 18-5] Cannot loc terminal 'processing_system7_0_SPI1_SS_pin' at site E6, Site location is not valid ["D:/Mzed_projects/maxref3pa/maxref3pa.srcs/constrs_1/new/arm_system_stub.ucf":10]
Implementation
Bit file generation
[Bitgen 342] This design contains pins which have locations (LOC) that are not user-assigned or I/O Standards (IOSTANDARD) that are not user-assigned. This may cause I/O contention or incompatibility with the board power or connectivity affecting performance, signal integrity or in extreme cases cause damage to the device or the components to which it is connected. To prevent this error, it is highly suggested to specify all pin locations and I/O standards to avoid potential contention or conflicts and allow proper bitstream creation. To demote this error to a warning and allow bitstream creation with unspecified I/O location or standards, you may apply the following bitgen switch: -g UnconstrainedPins:Allow
[Bitgen 157] Bitgen will terminate because of the above errors.
So I looked at the datsheet given for the MicroZed board: http://www.microzed.org/sites/default/files/documentations/MicroZed_HW_UG_v1_4.pdf page #14 shows the PMOD configuration and page #12 shows the LED pin #.
The pin numbers look correct wrt my ucf. can any MicroZed guru here help?
Thanks in advance,
