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confused about axi ps-pl interfacing

smvo555

Hi everyone, (any one please!)

I'm not great with processor architectures and software development.

I've been trying to get a simple application running where an HDL module controls the state of the user LED.
I can do this on the processor side, but I haven't been able to have the processor check the state of my HDL port.

I know there are a number of ways to do this, like sharing dual port RAM, I would like to implement the most direct method, which I think is using the EMIO directly.

Please correct my understanding of this:  

When I enable the EMIO in the Zynq7 Processing System a port is created called GPIO_0. I specified the width as 1, and connected it to my HDL modules port in the wrapper.
So in the application, I should be able to check the state of MIO 54, the first EMIO pin. However when I do this the value is 0, which isn't correct.

Okay, so do I need to connect the AXI interconnect for this? How would this be done to have the PS check the state of a PL port? Do I need to instantiate the AXI in the wrapper as well as in the block design?

Any guidance is much appreciated, I've been at this for a while now trying to get my head around the AXI

Thanks

Sam

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  • 0

    There are several ways to control Zynq outputs, including using either the built in PS (Processing System) GPIO or adding an AXI GPIO IP block in the PL (Programmable Logic) section of the device. If the Zynq output pin you want to control is connected to the PL portion of the device they you could use either method by connecting the axi GPIO directly to the output or by connecting the PS GPIO via EMIO connection to the PL.

     

    The User LED on the MicroZed you want to control is connected to one of the dedicated PS MIO pins (MIO[47]) so the only way to control this pins is using the PS GPIO directly (not using EMIO). You can take a look at the Zynq Technical Reference Manual, UG585, for more details: 

    http://www.xilinx.com/support/documentation/user_guides/ug585-Zynq-7000-TRM.pdf

     

    Once you have exported your design from Vivado to the SDK open up the system.mss file (under the 'bsp folder to the left in the Project Explorer pane if it did not open automatically) and click on the 'examples' link to the right of the ps7_gpio_0 under 'Peripheral Drivers' for examples on how to read and write the PS GPIO.

     

    There are also examples of using both PS GPIO and axi GPIO in the ZedBoard Zynq Concepts Tools and Techniques tutorial here: http://microzed.org/support/design/1521/11 that might be useful even though it targets the Zedboard. We will also be posting our Avnet Zynq SW and HW Speedway training material to the site in the near future. The labs for these trainings target either the ZedBoard or the MicroZed.

     

    -Gary

  • 0 in reply to Former Member

    Thanks Gary for your reply,

    If I want the PS to have access to a byte of data generated in the PL, what is the general procedure for connecting the PS GPIO via EMIO connection to the PL?
    When I create an external port connecting to GPIO_0, the EMIO port on the PL, the wrapper that gets generated has the connection specified as an inout and connected to an IO buffer. I only want the EMIO port to connect to a PL port, not an external pin. The GPIO_0 doesn't want to connect to my HDL port. I have not been able to find any available connections listed for GPIO_0. How do I interface with it? Now I am working on adding AXI lite slave connections to the HDL, I am still unclear on how the slave ports will connect to EMIO on ps7

    -Sam

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  • 0 in reply to Former Member

    Thanks Gary for your reply,

    If I want the PS to have access to a byte of data generated in the PL, what is the general procedure for connecting the PS GPIO via EMIO connection to the PL?
    When I create an external port connecting to GPIO_0, the EMIO port on the PL, the wrapper that gets generated has the connection specified as an inout and connected to an IO buffer. I only want the EMIO port to connect to a PL port, not an external pin. The GPIO_0 doesn't want to connect to my HDL port. I have not been able to find any available connections listed for GPIO_0. How do I interface with it? Now I am working on adding AXI lite slave connections to the HDL, I am still unclear on how the slave ports will connect to EMIO on ps7

    -Sam

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