Hi,
I am attempting to follow the tutorial for the Zynq Mini-ITX (MITX): ALI3 Display Reference Design.
However, running the script make_mitx_ali3_sharp7.tcl generates a seemingly "empty" project. The resulting block diagram has no IP blocks and is comletely empty. The wrapper file causes an error due to its lack of ports:
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
library UNISIM;
use UNISIM.VCOMPONENTS.ALL;
entity mitx_ali3_sharp7_wrapper is
end mitx_ali3_sharp7_wrapper;
architecture STRUCTURE of mitx_ali3_sharp7_wrapper is
component mitx_ali3_sharp7 is
end component mitx_ali3_sharp7;
begin
mitx_ali3_sharp7_i: component mitx_ali3_sharp7
port map (
);
end STRUCTURE;
What could be causing this reference design to not generate properly?
Thank you
