usage of qspi pins by programmable logic

Can QSPI pins be used by the programmable logic? ug585-Zynq-7000-TRM.pdf, figures 2-3 and 2.-5 show programmable logic connected through EMIO block to MIO mux which implies that EMIO signals could connect to the same device pins as QSPI0/1 lines. However, table 2-3 shows that Quad-SPI peripheral cannot connect to EMIO. Does Zynq 7000 have dedicated QSPI pins ? The schematic diagram for Mini-ITX shows QSPI signals on the board connected to PS_MIO0_500 through PS_MIO15_500. The pin names would suggest they are not dedicated for QSPI.

0 bhfletcher over 10 years ago

None of the MIO pins can be used by the PL. Some controllers are able to be routed through EMIO into PL and then to PL I/O, but the QSPI controller is NOT one of those. In general, those devices that might be used for booting (Flash) or are timing critical (USB 2.0), cannot be routed to EMIO.

When using MIO, there are specific pins to use for each controller, but they overlap. If you choose to enable the QSPI, then there is only one mapping to the MIO. If you choose not to enable the QSPI, then those MIO can be used for something else.

Bryan
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0 Former Member over 10 years ago in reply to bhfletcher

I was not clear in my first post of what I'd like to do. I plan not to use QSPI in which case device pins PS_MIO0_500 through PS_MIO15_500 will be:
1. left unused on the Mini-ITX board or
2. used by PL.
I was wandering if case 2 is possible.
Thanks for reply.
Artur
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0 bhfletcher over 10 years ago

Perhaps I still misunderstand. Based on what you stated for Case 2, I'll repeat what I stated above:
None of the MIO pins can be used by the PL.

Bryan
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