Hello, I am using a Zynq7000-SOC and am trying to put in a "AXI Central Direct Memory Access" block in the PL in order to move some data from DDR to DDR. Eventually I want to move data from PL to SRAM but I wanted to try DDR to DDR first just to see how it would work.
I have a block diagram like below:
So basically, the Zynq7000-SOC's M_AXI_GP0 port is connected to the "AXI Central Direct Memory Access" block (axi_cdma_0) for configuration of the DMA. I have the axi_cdma_0 connected to two different HP ports of the Zynq7000 - so I am using both S_AXI_HP0 and S_AXI_HP2.
I should mention that I am using the Minized platform from Avnet which has 512 MB of DDR. Now, when I go to the Address Editor, I see these addresses:
Now, I am using a BSP for Minized so I suppose it understands that only 512 MB of DDR exist because if I try to change the 'Master Base Address' of one of my ranges to above 0x1FFF_FFFF (for instance, I tried 0x2000_0000) I get this error:
I'm assuming this is because the address is above the 512 MB range. I was just wondering a few things
1. Is that assumption I made correct? Does it not allow me to go over the 0x1FFF_FFFF range because only 512 MB of DDR exist?
2. How does this play into the picture for the total address range accessible to me? The AXI_HP ports should also have access to OCM, but if OCM is mapped high I should be able to access the range 0xFFFC_0000 which won't be possible currently. I would get the error.
3. I saw the system table map mentioned in the Zynq TRM (UG585) and it shows that memory ranges for DDR go up to 0x3FFF_FFFF. What does this mean for the MiniZed? What is technically the max range I should be able to access through the PL?
4. Can I access the same memory location from PS and PL? For example, if I perform a DMA transaction to read data from address 0x1000_0000 - 0x1000_FFFF and write that data to address 0x1001_0000 - 0x1001_FFFF can I read address 0x1001_0000 from the PS and see the moved data?
Thanks for the help!