Minized System generator hardware in the loop

I would like to ask if anyone has experience or has managed to achieve hardware in the loop simulations using the minized board in matlabs system generator. I'm not sure if it is possible to enable the JTAG interface and whether or not board definition files exist for system generator.

Thanks.

flyingbean over 1 year ago

Do you need a Matlab license to do hardware-in-loop on FPGA platform? System generator should not need a board definition files. The flow to generate bitstream will need the board definition files.
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jimmi1 over 1 year ago

For system generator you do need a licence yes. The system generator gives several evaluation boards such as Artix 7 but for unsupported boards it does require definition files. I have never done it before was wondering if anyone had.
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