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PicoZed / Carrier Ethernet PHY RXC Routing

chailatte

Hi folks,


Thinking I've encountered a concern regarding the routing of the Rx Clock on the Ethernet PHY on the PicoZed FMCC Carrier Card, and wanting to turn it over to some other eyes to confirm or refute.


I'm preparing to use the Carrier Card to prototype a gigabit ethernet connection driven by logic on the Zynq PL of a PicoZed card, instantiating the AXI Ethernet Block (R6.2).  (Need to support jumbo frames, which precludes using a MAC of the PS.)


From the schematics of PicoZed and FMCC carrier, I trace the RXC receive channel clock of the Marvell PHY on the carrier through JX2 pin 94 to pad V11 of the Zynq 7020.  But since V11 is not an MRCC or SRCC pin, Vivado (rightfully, I believe) complains vociferously at its inability to successfully route the design.


On further study of the schematics, I find the a nearby JX2 connector pin 74, which does route to an SRCC pin, in the same I/O bank 13 as the other signals of the PHY interface.  It is labeled IO_L14P_T2_SRCC_13 on the Zynq, bonded to pad Y9, and makes the implementation tools much much happier.


But before I turn the carrier card over to our tech folks for the minor surgery needed to reroute the PHY's RXC output through JX2.74, I thought I'd check with the group to see if anyone could confirm (or otherwise comment upon) both:
1) my reading of the documentation; and
2) its accuracy.


In case it matters, the carrier card I have is labeled MBCC-PZCC-PCB-C, 1450043.


Many thanks,


Joseph

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  • 0

    I would suggest a cleaner approach would be to use the Ospero Quad GigE FMC Card ( http://ethernetfmc.com/ ) with either a ZedBoard, a MicroZed with the MicroZed FMC Carrier Card, or a PicoZed with the soon to be released PicoZed FMC Carrier Card V2. Either of these options would provide for a solution that does not require reworking a board and has the correct routing and signal assignments. In addition there is a supported reference design on the ethernetfmc.com site for the Zedboard that should be easy to move to one of the other platforms.

     

    -Gary

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  • 0

    I would suggest a cleaner approach would be to use the Ospero Quad GigE FMC Card ( http://ethernetfmc.com/ ) with either a ZedBoard, a MicroZed with the MicroZed FMC Carrier Card, or a PicoZed with the soon to be released PicoZed FMC Carrier Card V2. Either of these options would provide for a solution that does not require reworking a board and has the correct routing and signal assignments. In addition there is a supported reference design on the ethernetfmc.com site for the Zedboard that should be easy to move to one of the other platforms.

     

    -Gary

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  • 0 in reply to Former Member

    Gary,

    I have a carrier card of my own design and I am in the process of designing another card however in this design the end user would like to have 2 ports. For the first design, which had 1 port, I simply routed the PHY outputs coming from the Picozed to magnetics on the board. The design works fine. For the rework I was planning on using the same setup that is currently on the V1 carrier card for the second port. The end user will have GME1 from the PS available so in theory if I duplicate the design of the carrier card and the PS TEMAC is used then there should be no problem. But, since I am redoing the board and can simply rout the RXclk to a compatible pin that is what I will do. Does this sound correct to you?

    My main concern is with the end user. He wants to have a reference design to start with and that is why I would like to have a copy of the working one.

    on a side note in reference to another query above, I believe that the main reason for the 2.5V as opposed to the 3.3V is related to output drive strength and edge timing.