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PicoZed Hardware Design Data storing - Picozed with multi-channel ADC
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Data storing - Picozed with multi-channel ADC

Former Member
Former Member over 7 years ago

Dear Community,
I'm writing to confront design approach regarding high-speed, multichannel ADC system. In my design I want to have 8/16 channel, 10-60 MSPS ADC which I want to connect to PicoZed and store ADC data in quite large bursts to be then processed by PS side, so my thinking is:
 -> for lower sampling rates, move data in real time (let's say 5 MB at once) via DMA and HP ports to the PS DDR3 - my understanding from different sources is that 300-400MB/s is achievable
 -> for higher sampling rates, fit as much as possible (maybe ~400kB) in block RAM in a single "burst"

Therefore I have a few questions:
-> is there some flaw in my thinking about approaching such a desgin?
-> would external memory connected directly to the PL be able to handle more throughput than PicoZed's PL-PS HP connection?

Thanks in advance for any comments.
Best regards.

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  • drozwood90
    0 drozwood90 over 7 years ago

    Hi there,

    I would not eat up more BRAM than you HAVE to as you will start to get into more and more routing congestion as you start to pull in BRAM from around the chip.

    I cannot say there are flaws as it depends on what you choose to do and how much effort you want to put into this.

    Depending on how fast and how wide you make the memory, the PL writing directly to memory will be faster as you do not need to wait for the Snoop memory controller and you will not be limited by the hardened memory controller in the PS.  There are drawbacks as you will need to use PL logic space to access this memory and you will consume pins to talk to the memory.

    Is there a reason you cannot preprocess the data in the PL?  You can perform many filtering and other operations directly in the PL, which would save you a LOT of bandwidth as you only need to place results in memory, vs every data sample.

    --Dan

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  • Former Member
    0 Former Member over 7 years ago

    Hi,
    thank you very much for your reply,
    PL data processing will also be considered, but one of the design demands is to just store as much as possible real-time non interrupted ADCs data in a single chunk. I think I will go with the PS DDR for the first shot, then consider hardware change for dedicated PL memory.
    Best regards.

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