XAPP1171 for PicoZed

Hello Houssam,

Have you tried taking a look at the PCIe End Point Reference Design that we offer? It can be found here

http://zedboard.org/support/design/13076/106

--Josh

The main issue with that design, is it uses the "7 Series FPGAs Integrated Block for PCI Express" IP block instead of the "AXI memory mapped to PCI Express" IP block, which turned out more complicated and less convenient for me

I only want to send data from DDR to an outside Root Port PCIe device using the Picozed PCIe X1

Hi there,

At this time we do not have an AXI to PCIe design.  The above listed example is the only one at this time.

I think if you follow the XAPP you listed above you will do well!

--Dan

Hi Houssam EL LAKKIS!

Is it possible to contact you directly? Via PM, via another channel?
I would like to talk about AES-Z7PZ-7Z030, that you have been using.

Thank you!

Heldur