Is there a way to route the onboard ethernet interface on the PicoZed into the PL first so that all traffic can be captured and filtered before being sent on to the ARMs? Most of the traffic needs to bypass the CPU and be handled in FPGA logic, some control messages need to be sent on to the ARM for software handling.
Can anyone point to any examples of this or indicate how it might be accomplished if possible?
Appreciate your time and assistance in advance.