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eMMC -- Fix high speed but remove PS MIO mux

bhfletcher

Due to the PicoZed eMMC speed issues, we have been doing some additional testing. We have found that the mux that allows the user to select between PS MIO going to the JX connector or using the eMMC was affecting the performance. When the mux is removed and hard-wired across the pads to connect the eMMC, previously failing eMMC circuits will pass at cold temperatures running at 50 MHz in x4 mode.

 

We are considering a PCB revision to PicoZed that will replace the mux with resistor jumpers. The resistors would be set to select the eMMC. If someone wanted to use the PS MIO on the JX connector instead, they would have to request a special version that had the resistors populated in the other position.

 

If you are designing PicoZed into your product and using the PS MIO[9:15] through the JX connector on your carrier, will you please contact me with the challenges this may present? You are welcome to reply in this forum or private message me.

 

Bryan

  • I am also finding issues at low temp (-40C).  I have been trying to find out the detail changes required to switch from High Speed Mode to Standard Mode using 2015.2.  

    Are there any specific details on removing the MUX described in the post eMMC -- Fix high speed but remove PS MIO mux?

  • Hello rmoning,

    Please refer to Section 3.7 of the "PicoZed 7015/7030 Rev C errata" located on this webpage http://zedboard.org/support/documentation/4736 located under the Errate and Product Change Notices section.

    --Josh

  • in reply to jafoste4

     My fault for not being more specific.  We have a system that has been thru testing that uses the AES-Z7PZ-7Z020-SOM-I-G with Petalinux developed using 2015.2 tools.  We really don't want to change to using 2016.2 tools at this time, which would result in needing to restart all of our testing.  We recently found a fault condition similar to the conditions described in forum post "PicoZe fails to load OS from eMMC at low temp".  Basically at low temp the PicoZed fails to read from the eMMC during boot. There seem to be several suggested solutions with very little detail as to how they can be implemented in an existing design.  Does the sdio timing need to be changed in the Zynq Processing system clock configuration to achieve the standard mode operation. Does this change the timing for both sdio channels?   What changes, if any, need to be made to UBOOT and the Petalinux installation?  Is there some way to determine what the changes were from the 2016 BSP?  

     

     

  • Hello,

    Thanks for clarifying, if you would like the details of the hardware change then you will need to contact your local Avnet FAE. 

    The software fix is described in this document http://zedboard.org/content/booting-picozed-using-qspi-and-emmc-0

    This software fix is vaible for Petalinux Builds of 2014.4 or later.

    --Josh