We are in the process of designing a carrier card for our PicoZeds and I wanted to get a sanity check on our setup for powerup. While we think we are correct, we have another product with a larger Zynq chip that is blowing eFUZEs, so we want to make sure that our setup for this project is sound. It looks like the critical power sequencing is handled by circuitry on the PicoZed itself, but again, would like to verify. For reference, we are using the part, AES-Z7PZ-7Z010-SOM-I-G.
Our plan is as follows...
1. PWR_ENABLE will remain disconnected on our carrier, allowing it to float. Which should allow PWR_ENABLE to pull high to VIN.
2. VCCO_34 and VCCO_35 are going to be powered up immediately. Although recommend, it appears that it is not necessary for them to enable after the 1.8V (VCCIO_EN) has been enabled? Can these VCCOs come up at any time without adverse effects?
3. The carrier design guide for the PicoZed suggests that for power down, VCCIO_EN should be pulled low first before PWR_ENABLE. Is this something that our carrier needs to handle, or is it handled by the PicoZed itself?
Thanks for your assistance,