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PicoZed SDR Software-Defined Radio PicoZed SDR PL ETH problem
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Related

PicoZed SDR PL ETH problem

Former Member
Former Member over 8 years ago

Hi.

We have a PicoZed SDR paired with an Avnet eval board (AES-PZSDRCC-FMC-G). I'm having trouble with the 2nd ethernet interface (PL), which is connected to a Marvel 88E1512 PHY over RGMII on the carrier card. Going through PS (GEM1) is not an option because our design is PL based.

I'm on Vivado 2015.1, using TEMAC core v9.0. The problem is that I cannot seem to receive data properly on the TEMAC core. When I scope the TEMAC core, I see packets being converted properly from RGMII to GMII. But within the core, the data gets corrupted where half the bytes are dropped. I get a bad frame flag and nothing comes out the M_AXIS bus.

Here's a screenshot from the debug core (all the signals are within the TEMAC core):

http://picozed.org/sites/default/files/u118491/2.png

I've also probed the PHY with an oscope and the RXC looks good @ 125MHz. I'm also certain the 2nd ethernet interface is working properly because the pre-compiled SD card that came with the eval board boots up and I can bring it up with ifconfig on a UART terminal. But this is not ideal because we would like to go PL-only for the 2nd ethernet.

 

Thank you, in advance.

-- Benimage

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  • mbrown
    0 mbrown over 8 years ago

    Hi Ben,

    We don't have a PL-based Ethernet design for PicoZed SDR.  However, we've passed your request to the Avnet FAE in your area who will contact you with a possible solution.

     

    Thanks,

    Matt

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