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AXI-LIte + Linux

Former Member

Hi all;
We have modified the DEMO project (Zedboard) and have added our IP which has a register with Axi-Lite communication (Slave with ap_hs communication). This IP is connected to Axi-Interconnect-0 and its direction is 0x43100000.
However, we had never problem with communication in "standalone" but when we use linux, we couldn't communicate with that register.
Mi question is: do we have to modify the DeviceTree.tdb and add IP?
In xilinx forum we saw that we can use mmap for read and write in the gpio, and in this case can we use mmap for this? One member of this forum mentions: ioremap must be used to read and write (physical address to a virtual address).
http://forums.xilinx.com/t5/Embedded-Linux/ZC702-How-to-access-custom-PL-logic-from-Linux-Kernel-Module/td-p/234874
Then, if we can use mmap and ioremap how can we use ioremap and mmap?

Any advice will be very helpful.
Ty a lot.
Paco

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  • 0

    Hi Peaceo,

    This can be done without having to resort to mmap() but you will need to add a device tree entry for your custom device.

    Here is the device tree entry for my LED brightness driver that accesses a PL AXI-Lite hardware controller at 0x41200000:

    led-brightness@412000000 {
        compatible = "avnet,led-brightness";
        reg = <0x41200000 0x20>;
    };

    Now in my driver, I have a platform device that I can later use to get the physical address of the I/O
    registers from the platform definition.

    /* platform device structures */
    struct platform_device *pdev;

    I also have the following lines in my probe function to retrieve the physical address space for my device instance within the platform definition.  Then this IO region is requested and ioremapped for read/write use:

    /* Obtain the memory resource for this device */
    led_brightness_dev->mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);

    led_brightness_dev->mem = request_mem_region(led_brightness_dev->mem->start, resource_size(led_brightness_dev->mem), pdev->name);

    led_brightness_dev->iobase = ioremap(led_brightness_dev->mem->start, resource_size(led_brightness_dev->mem));

    Now in my write function, I can write into the remapped memory space and hit the slave hardware controller:

    writel((value * LED_BRIGHTNESS_FACTOR), dev->iobase);

    It may not be the most elegant way to accomplish this but it takes advantage of the device tree which can be really helpful if the hardware guys start switching the PL memory map around on you ;)

    Regards,

    -Kevin

Reply
  • 0

    Hi Peaceo,

    This can be done without having to resort to mmap() but you will need to add a device tree entry for your custom device.

    Here is the device tree entry for my LED brightness driver that accesses a PL AXI-Lite hardware controller at 0x41200000:

    led-brightness@412000000 {
        compatible = "avnet,led-brightness";
        reg = <0x41200000 0x20>;
    };

    Now in my driver, I have a platform device that I can later use to get the physical address of the I/O
    registers from the platform definition.

    /* platform device structures */
    struct platform_device *pdev;

    I also have the following lines in my probe function to retrieve the physical address space for my device instance within the platform definition.  Then this IO region is requested and ioremapped for read/write use:

    /* Obtain the memory resource for this device */
    led_brightness_dev->mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);

    led_brightness_dev->mem = request_mem_region(led_brightness_dev->mem->start, resource_size(led_brightness_dev->mem), pdev->name);

    led_brightness_dev->iobase = ioremap(led_brightness_dev->mem->start, resource_size(led_brightness_dev->mem));

    Now in my write function, I can write into the remapped memory space and hit the slave hardware controller:

    writel((value * LED_BRIGHTNESS_FACTOR), dev->iobase);

    It may not be the most elegant way to accomplish this but it takes advantage of the device tree which can be really helpful if the hardware guys start switching the PL memory map around on you ;)

    Regards,

    -Kevin

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  • 0 in reply to zedhed

    hi
    i am trying to access pl logic in which dipswitch and led are configured in [C_BASEADDR = 0x41200000+0x00 CHANNEL 1 AXI GPIO DATA REGISTER]
    here logic is created for 4 bits of CHANNEL 1 AXI GPIO DATA REGISTER,which is like


    axi_gpio_0_GPIO_IO_pin[0]        u00E8 LED DS19

    axi_gpio_0_GPIO_IO_pin[1]        u00E8 LED DS20

    axi_gpio_0_GPIO_IO_pin[2]        u00E8 DIP SWITCH SW12

    axi_gpio_0_GPIO_IO_pin[3]        u00E8 DIP SWITCH SW12

    in this i want to glow led with switch through ioremap
    can anyone tell how it can be done
    i did ioremap of physical address(C_BASEADDR = 0x41200000)+offset(0x00) and then tried to write value in virtual address which i got but not able to see led glowing.