Hi, all,
I have an IP generated by vivado hls as the accelerator of my project and I also use the scu timer to get the execution cycles of other functions which are implemented in software. The hardware IP contains the interrupt interface.
I find that if I seperate the accelerator and test it alone, it behave correct. (I do not use timer here). However, When I put
it into my whole design, the accelerator always busy waiting. My whole design use scu timer to estimate the performance of different functions.
Is it the problem that I can not use scu timer and interrupt (when hardware finished, it will generate an interrupt) at the same time? (PS: I do not mean to implement a scu timer with interrupt feature)
I am using Zedboard and Xilinx 14.5
Any one could give me some advice?
Thanks