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Android

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Is there a way to implement the following design?

1) Run C code generated from Matlab in a real-time bare metal configuration on Arm core 0.

2) Run Android on Arm core 1 which will peek and poke data from the programmable logic and Arm core 0 and send it out to the PC via ethernet, or display it via a touchscreen.

3) Run custom or Matlab HDL Coder generated VHDL on the programmable logic.

The programmable logic and Arm core 0 are running real time application code and Android serves as a non real time interface between the host PC or visualization equipment.

I would like to get started on a design that implements this technology and am wondering if there is anybody out there willing to struggle through this with me.  Thanks for your time.

  ,Doctor K



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    My apologies - I was talking for Zynq in general, not Zed.  Yes, the Zedboard only has two DDR chips, and they are connected to the DDR hard-block controller in the Processing System (PS).  If you wanted to run an OS on one core, and bare metal on the other (on the Zedboard) you would be sharing bandwidth, correct.

    I am very excited about the board as well, can't wait to get my hands on it and start putting together demo's!! :D

    You can also place weight to the DDR arbitration inside of the device.  The cache arbiter has four ports, and a control signal that is 4 bits wide.  Setting a bit to high set's it's priority to high, this guaranteeing max bandwidth.

    -TD

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  • 0

    My apologies - I was talking for Zynq in general, not Zed.  Yes, the Zedboard only has two DDR chips, and they are connected to the DDR hard-block controller in the Processing System (PS).  If you wanted to run an OS on one core, and bare metal on the other (on the Zedboard) you would be sharing bandwidth, correct.

    I am very excited about the board as well, can't wait to get my hands on it and start putting together demo's!! :D

    You can also place weight to the DDR arbitration inside of the device.  The cache arbiter has four ports, and a control signal that is 4 bits wide.  Setting a bit to high set's it's priority to high, this guaranteeing max bandwidth.

    -TD

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