I am trying to configure the SPI controller on board the ARM processor of zedboard. I am closely following the instructions given in UG585. I have 2 questions which I am not able to solve.
(1) The user guide stats that Tx-FIFO is 128 bytes long but how to access that FIFO. I see that there is only one Tx_data_reg0 which can contain only one byte of valid data.
(2) Assuming that I write a byte of data into Tx_data_reg0, I see that it is appearing on the MISO line contentiously even after slave select is de-asserted and SPI controller is disabled, how would I stop data transfer after that one byte.
(SS is going high but data and clock do not stop even after disabling SPI controller).
Could someone please help me sorting out these issues.