I have a question about Partial reconfiguration with Zedboard.
Has someone ever successfully read from a reconfigurable partition?
I ask this question because are a lot of days in which I'm experiencing a very strange problem: using partial reconfiguration flow I get a full bitstream which works fine until I perform a read operation on a peripheral which resides into reconfigurable partition.
In particular if I do a simple read operation like *ptr=0x83C10000 and then K=*ptr, the PS hangs!
I've checked for clocks, reset, timing etc. but all these parameters are correct, and I've also used ILA to see if signals come into PL and I can state that AXI read/write protocol ends successfully in the PL.
Other attempts have been made by changing something in both static and reconfigurable partition (e.g. using a different M_AXI_GPx port, using only an AXI Slave generated by Vivado into rec. partition etc. ) but the behaviour is the same: a read into reconfigurable partition freezes the PS (and I think that it happens when the read data are moved into memory).
If I put the logic of the "reconfigurable partition" into the static one all works without problems.
In addition I've used different static designes (even that provided by ADI for ADV7511, which works), so I don't think that the problem is a configuration of the static partition.
After many attempts I think that the problem resides into Xilinx's Tools (I'm using Vivado/SDK 2015.2), and I've already asked into the Xilinx forum but, until now, no one did give me an hint.
There is someone that, using those tools, can read from a reconfigurable partition?
P.s. many Xilinx's tutorials about partial reconfigurations (e.g. that of image processing) use an older version of the tools...