I just finished the workshops about the partial reconfiguration flow in Xilinx University Program. But the examples is performing in Virtex FPGAs and microblaze processor. Is there any examples of partial reconfiguration flow on zedborad?
I just finished the workshops about the partial reconfiguration flow in Xilinx University Program. But the examples is performing in Virtex FPGAs and microblaze processor. Is there any examples of partial reconfiguration flow on zedborad?
