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AXI_GPIO Block width

Former Member

Hi everyone,
i'm currently working on a zedboard and have been able to achieve the following steps:

reading and writing to any MIO
reading and writing to any IO routed by an AXI_GPIO block

there's still one thing i am not getting right:

for instance i would like to read the 8 different switches.
I create a top and a bitstream with an AXI GPIO BLOCK with a width set to 8.
the .mhs then created looks like

BEGIN axi_gpio
PARAMETER INSTANCE = axi_gpio_0
PARAMETER HW_VER = 1.01.b
PARAMETER C_GPIO_WIDTH = 8
PARAMETER C_BASEADDR = 0x41200000
PARAMETER C_HIGHADDR = 0x4120ffff
BUS_INTERFACE S_AXI = axi_interconnect_1
PORT S_AXI_ACLK = processing_system7_0_FCLK_CLK0
PORT GPIO_IO = axi_gpio_0_GPIO_IO
END

then i suppose my ucf file will be like

NET axi_gpio_0_GPIO_IO[0] ...
.
.
NET axi_gpio_O_GPIO_IO[7] ...

and finally on the software C:

XGpio mySw;
XGpio Init(&mySw)

but then i am only able to read/write to the First (least significant bit) switch.
How do you handle the fact of having a bunch of GPIO into an AXI GPIO?

The only answer i found yet was to create an AXI GPIO BLOCK for every GPIO
which means that my ucf is now like
NET axi_gpio_0_GPIO_IO ...
.
NET axi_gpio_j_GPIO_IO ..
.
NET axi_gpio_n_GPIO_IO ...

and in the software i declare a XGpio for every single GPIO.
Which is pretty heavy and i'm sure there's one thing i'm missing, one way of doing it better.

Thanks for your advices

  • 0

    Looks like ur hardware design is fine, but take a closer look on XGpio structure:

    /**
    * The XGpio driver instance data. The user is required to allocate a
    * variable of this type for every GPIO device in the system. A pointer
    * to a variable of this type is then passed to the driver API functions.
    */
    typedef struct {
    tu32 BaseAddress;t/* Device base address */
    tu32 IsReady;tt/* Device is initialized and ready */
    tint InterruptPresent;t/* Are interrupts supported in h/w */
    tint IsDual;tt/* Are 2 channels supported in h/w */
    } XGpio;

  • 0

    thanks for your quick answer,
    i find it rather hard having documentations,
    i barely found two examples (the tutorial & zynqgeek on github ).
    i guess you found this inside the #xilinx includes

    i should have a closer look at the different process like Gpio Initialize, Gpio write and read, i'll check this tomorow.

    So if my h/w specification is right (the one with a single axi_gpio_O_IO but with the [7:0]
    you suggest that the solution is in the u32 BaseAdress? linked to the axi_gpio (.mhs)
    PARAMETER C_BASEADDR = 0x41200000
    PARAMETER C_HIGHADDR = 0x4120ffff

  • 0 in reply to Former Member

    You also have to set directions - I don't know if you did already.
    Post the all relevant code.

  • 0

    thanks for your help
    i'll give you everything and will try to be the most accurate.

    i have an axi gpio block for my 5 buttons
    and an axi gpio block for my 8 LEDS
    this is my .mhs

    PORT axi_gpio_0_GPIO_IO_pin = axi_gpio_0_GPIO_IO, DIR = IO, VEC = [7:0]     -- for the leds
    PORT axi_gpio_1_GPIO_IO_pin = axi_gpio_1_GPIO_IO, DIR = IO, VEC = [4:0]     -- the push buttns
    PORT processing_system7_0_GPIO_pin = processing_system7_0_GPIO, DIR = IO, VEC = [7:0]


    BEGIN axi_gpio
    PARAMETER INSTANCE = axi_gpio_0
    PARAMETER HW_VER = 1.01.b
    PARAMETER C_GPIO_WIDTH = 8
    PARAMETER C_BASEADDR = 0x41200000
    PARAMETER C_HIGHADDR = 0x4120ffff
    BUS_INTERFACE S_AXI = axi_interconnect_1
    PORT S_AXI_ACLK = processing_system7_0_FCLK_CLK0
    PORT GPIO_IO = axi_gpio_0_GPIO_IO
    END


    BEGIN axi_gpio
    PARAMETER INSTANCE = axi_gpio_1
    PARAMETER HW_VER = 1.01.b
    PARAMETER C_GPIO_WIDTH = 5
    PARAMETER C_ALL_INPUTS = 1
    PARAMETER C_BASEADDR = 0x41240000
    PARAMETER C_HIGHADDR = 0x4124ffff
    BUS_INTERFACE S_AXI = axi_interconnect_1
    PORT S_AXI_ACLK = processing_system7_0_FCLK_CLK0
    PORT GPIO_IO = axi_gpio_1_GPIO_IO
    END


    this is my constraint file .ucf
    //AXI GPIO LEDS [7:0] LVCMOS25 pr les LEDS
    NET axi_gpio_0_GPIO_IO_pin[0] IOSTANDARD=LVCMOS33 | LOC = T22 ;
    NET axi_gpio_0_GPIO_IO_pin[1] IOSTANDARD=LVCMOS33 | LOC = T21 ;
    NET axi_gpio_0_GPIO_IO_pin[2] IOSTANDARD=LVCMOS33 | LOC = U22 ;
    NET axi_gpio_0_GPIO_IO_pin[3] IOSTANDARD=LVCMOS33 | LOC = U21 ;
    NET axi_gpio_0_GPIO_IO_pin[4] IOSTANDARD=LVCMOS33 | LOC = V22 ;
    NET axi_gpio_0_GPIO_IO_pin[5] IOSTANDARD=LVCMOS33 | LOC = W22 ;
    NET axi_gpio_0_GPIO_IO_pin[6] IOSTANDARD=LVCMOS33 | LOC = U19 ;
    NET axi_gpio_0_GPIO_IO_pin[7] IOSTANDARD=LVCMOS33 | LOC = U14 ;

    //AXI GPIO PUSH BTNS [4:0] LVCMOS 25 pr les btns
    NET axi_gpio_1_GPIO_IO_pin[0] IOSTANDARD=LVCMOS25 | LOC = T18;
    NET axi_gpio_1_GPIO_IO_pin[1] IOSTANDARD=LVCMOS25 | LOC = R18;
    NET axi_gpio_1_GPIO_IO_pin[2] IOSTANDARD=LVCMOS25 | LOC = R16;
    NET axi_gpio_1_GPIO_IO_pin[3] IOSTANDARD=LVCMOS25 | LOC = N15;
    NET axi_gpio_1_GPIO_IO_pin[4] IOSTANDARD=LVCMOS25 | LOC = P16;



    this is my soft application
    inside a main

    XGpio Gpio_Led;
    XGpio Gpio_Btn;

    //AXI GPIO LED INIT
        xStatus = XGpio_Initialize(&Gpio_Led,XPAR_AXI_GPIO_0_DEVICE_ID);
        if (xStatus != XST_SUCCESS)
        {
        tprint("Fail init LED AXI GPIOr
    ");
        treturn XST_FAILURE;
        }

        XGpio_SetDataDirection(&Gpio_Led,CHANNEL_1,OUTPUT);

        //AXI GPIO BTN INIT
        xStatus = XGpio_Initialize(&Gpio_Btn,XPAR_AXI_GPIO_1_DEVICE_ID);
        if (xStatus != XST_SUCCESS)
        {
          tprint("Fail init LED AXI GPIOr
    ");
        treturn XST_FAILURE;
        }

    then a writing process is like
    //write LED AXI
    XGpio_DiscreteWrite(&Gpio_Led, CHANNEL_1, 1);

    a reading process of the axi GPIO BTNS is like
    pushbuttons = XGpio_DiscreteRead(&Gpio_Btn, CHANNEL_1);

    which only writes and reads the LSB base address, so the only first LED and first BTNS

    first of all i write XGpio_Initialize(&Gpio_Led,XPAR_AXI_GPIO_0_DEVICE_ID);
    which if i'm right referes to the .mhs or the .ucf axi_gpio_0 which has a width of 8 and which describes my LEDS.
    same for the 5 pushbuttons.

    so it may come from the XPAR_AXI_GPIO
    it may also come from a wrong use of the writing and reading process maybe on the CHANNEL side.

  • 0 in reply to Former Member

    for ppl interested in
    the correct nesting of pins coming from a vector is
    NET ... pin_IO<i> and not [i] as i used to write