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Software Application Development Standalone+VivadoHLS design flow
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Related

Standalone+VivadoHLS design flow

e14 Contributor
e14 Contributor over 13 years ago

Hi all,
we have designed an AXILite ip core using VivadoHSL (two sw register with ap_hs protocol). The ip has its own clk to generate some signals (the sw regs as used as parameters to modify some features of this signals).
The core was added to the EDK demo project for ZedBoard.
The application was runned from SDK and the AXI iface works fine (the write and read on the sw registers), however the rest of the ip doesnu00B4t work.
initialization:
XIP_Config p1_config;
XIP p1;
p1_config.DeviceId = 0;
p1_config.Slv1_BaseAddress =
XPAR_IP_TOP_0_S_AXI_SLV1_BASEADDR;

XIP_Initialize(&p1, &p1_config);

We tried to run the ip core without the AXILite iface and it works fine.
Ty for help.

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  • sergicuen
    0 sergicuen over 13 years ago

    Hi Paco,
    maybe your HLS core is waiting for SW. SW has to write the regs and send the valid signal, then HLS core resume the work.
    Regards

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