I cloned the u-boot.git from xilinx and compiled it
[om@hexcore (v2015.2)/export/space/xilinx/src/u-boot-xlnx.git]
[791]$ ls u-boot*
2.3M u-boot* 4.0K u-boot.lds 1.2M u-boot.srec*
408K u-boot.bin* 372K u-boot.map
I created a .BIF file.
$ cat u-boot0.bif
the_ROM_image:
{
t[bootloader]/export/space/XXXX/workspace/microzed-fsbl/Debug/microzed-fsbl.elf
t/export/space/XXXX/microzed-sd-images/system.bit
t/export/space/xilinx/src/u-boot-xlnx.git/uImage.bin
}
Created BOOT.BIN
$ bootgen -image ./u-boot0.bif -o BOOT.BIN -w -log
When I boot this image, from FSBL I get the following message
.....
DMA Done !
FPGA Done !
In FsblHookAfterBitstreamDload function
Partition Number: 2
Header Dump
Image Word Len: 0x000195B6
Data Word Len: 0x000195B6
Partition Word Len:0x000195B6
Load Addr: 0x00000000
Exec Addr: 0x00000000
Partition Start: 0x000858C0
Partition Attr: 0x00000010
Partition Checksum Offset: 0x00000000
Section Count: 0x00000001
Checksum: 0xFFF2E3AC
Application
Handoff Address: 0x00000000
In FsblHookBeforeHandoff function
No Execution Address JTAG handoff
Obviously, the image does not have a load/exec address associated with.
uImage.bin is in fact the renamed binary u-boot.img.
[792]$ file uImage.bin
uImage.bin: u-boot legacy uImage, U-Boot 2015.04 for zynq board, Firmware/ARM, Firmware Image (Not compressed), 415384 bytes, Sun Aug 30 11:35:51 2015, Load Address: 0x04000000, Entry Point: 0x04000000, Header CRC: 0x9B6F14AF, Data CRC: 0xAA06E3B8
in uImage.bin, the entry point as well as load address is defined. But bootgen seems to ignore these two parameters.
How are you people compiling u-boot and creating the BOOT.BIN image? How to specify the load and entry points in the bootgen parameter list / bif file?
Thanks
BlueDev
