I followed some examples and I already managed to make a big S2MM (stream to memory-mapped) transfer via an AXI DMA (http://www.xilinx.com/support/documentation/ip_documentation/axi_dma/v7_1/pg021_axi_dma.pdf).
However, now I'm trying the reverse, i.e. to make a simple MM2S transfer to a very simple IP block that I made and the result returned from the block is wrong. Note that the MM2S code is also almost a copy from examples that I found.
I tried debugging with the ILA(integrated Logic Analyzer) tool from Vivado and the result is in attachement.
Can you help me understand why I'm writing the following values:
static void initialize_parameters(u32 SrcAddress){
u32 *BufferPtr;
union float32 thisfloat;
BufferPtr=(u32*)(SrcAddress);
thisfloat.f32=10.0;
BufferPtr[0]=thisfloat.u32;
thisfloat.f32=0.0;
BufferPtr[1]=thisfloat.u32;
thisfloat.f32=10.0;
BufferPtr[2]=thisfloat.u32;
thisfloat.f32=20.0;
BufferPtr[3]=thisfloat.u32;
}
and making a transfer like this:
// Kick off DMA transfers
Status = XAxiDma_SimpleTransfer(&axi_dma, PARAMETERS_ADDR, 4*4, XAXIDMA_DMA_TO_DEVICE);
and the signal parameters_TDATA when tvalid=1 is that thing that we can see in attachement? Also, the final result is incorrect. What am I doing wrong?
http://postimg.org/image/rnt7yc58v/
Also, here's a print screen of my block design in Vivado. Note: I'm working on a Zedboard
http://postimg.org/image/gi7nbfa0l/