Greetings,
I'm working with the UltraZed-SOM and the PCIe-Carrier card. I'm trying to work my way through modifying the .BSP with petalinux tools so that I can add some LEDs that I added in Vivado but am running into errors when I try to build. My steps have been:
1) Create simple design in Vivado, shown below. It is just a GPIO controller hooked up to the push buttons and LEDs of the board.
2) Run synthesis and implementation, export .HDF hardware description file.
3) Move the .HDF file and uz3eg_pciec_2017_2.bsp provided by Avnet over to my Linux virtual box running Mint 18.3 (Ubuntu with a different shell)
4) Run through the peta-linux install tutorial provided by Avnet (VirtualBox_Installation_Guide_2017_2.pdf)
5) Using the .HDF file generated from Vivado and the .BSP provided by Avnet, I run in the terminal:
# Create a pentalinux project from a BSP
petalinux-create -t project -s <path_to_bsp>
# CD into project directory then run this to import the .HDF into the project
# Exit menu when it pops up
petalinux-config --get-hw-description=../
# Build Linux
petalinux-build
6) During the petalinux-build command I get the following output:
z3r0@z3r0-vb ~/sf_Share/uz3eg_pciec_2017_2 $ petalinux-build
[INFO] building project
[INFO] sourcing bitbake
INFO: bitbake petalinux-user-image
WARNING: Host distribution "LinuxMint-18.3" has not been validated with this version of the build system; you may possibly experience unexpected failures. It is recommended that you use a tested distribution.
Loading cache: 100% |#############################################################################################################| Time: 0:00:01
Loaded 3258 entries from dependency cache.
Parsing recipes: 100% |###########################################################################################################| Time: 0:00:03
Parsing of 2466 .bb files complete (2427 cached, 39 parsed). 3259 targets, 225 skipped, 0 masked, 0 errors.
NOTE: Resolving any missing task queue dependencies
Initialising tasks: 100% |########################################################################################################| Time: 0:00:09
Checking sstate mirror object availability: 100% |################################################################################| Time: 0:00:16
NOTE: Executing SetScene Tasks
NOTE: Executing RunQueue Tasks
ERROR: fsbl-2017.4+gitAUTOINC+77448ae629-r0 do_configure: Function failed: do_configure (log file is located at /home/z3r0/sf_Share/uz3eg_pciec_2017_2/build/tmp/work/plnx_aarch64-xilinx-linux/fsbl/2017.4+gitAUTOINC+77448ae629-r0/temp/log.do_configure.12613)
ERROR: Logfile of failure stored in: /home/z3r0/sf_Share/uz3eg_pciec_2017_2/build/tmp/work/plnx_aarch64-xilinx-linux/fsbl/2017.4+gitAUTOINC+77448ae629-r0/temp/log.do_configure.12613
Log data follows:
| DEBUG: Executing python function sysroot_cleansstate
| DEBUG: Python function sysroot_cleansstate finished
| DEBUG: Executing shell function do_configure
| MISC_ARG is -yamlconf /home/z3r0/sf_Share/uz3eg_pciec_2017_2/build/tmp/work/plnx_aarch64-xilinx-linux/fsbl/2017.4+gitAUTOINC+77448ae629-r0/fsbl.yaml
| APP_ARG is -app "Zynq MP FSBL"
| cmd is: xsct /home/z3r0/sf_Share/uz3eg_pciec_2017_2/build/tmp/work/plnx_aarch64-xilinx-linux/fsbl/2017.4+gitAUTOINC+77448ae629-r0/app.tcl -ws /home/z3r0/sf_Share/uz3eg_pciec_2017_2/build/../components/plnx_workspace/fsbl -pname fsbl -rp /opt/petalinux-v2017.1-final/tools/hsm/data/embeddedsw -processor psu_cortexa53_0 -hdf /home/z3r0/sf_Share/uz3eg_pciec_2017_2/build/tmp/deploy/images/plnx_aarch64/Xilinx-plnx_aarch64.hdf -arch 64 -app "Zynq MP FSBL" -yamlconf /home/z3r0/sf_Share/uz3eg_pciec_2017_2/build/tmp/work/plnx_aarch64-xilinx-linux/fsbl/2017.4+gitAUTOINC+77448ae629-r0/fsbl.yaml
| Starting xsdk. This could take few seconds... Picked up _JAVA_OPTIONS: -Duser.home=/home/z3r0/sf_Share/uz3eg_pciec_2017_2/build/tmp/xsctenv
| Eclipse:
| An error has occurred. See the log file
| /home/z3r0/sf_Share/uz3eg_pciec_2017_2/components/plnx_workspace/fsbl/.metadata/.log.
| XSCTHELPER INFO: Empty WorkSpace
| Starting xsdk. This could take few seconds... Picked up _JAVA_OPTIONS: -Duser.home=/home/z3r0/sf_Share/uz3eg_pciec_2017_2/build/tmp/xsctenv
| done
| INFO: [Hsi 55-1698] elapsed time for repository loading 0 seconds
| INFO: Update hw fsbl_hwproj project
| CRITICAL WARNING: [Board 49-71] The board_part definition was not found for em.avnet.com:ultrazed_eg_pciecc_production:part0:1.0. The project's board_part property was not set, but the project's part property was set to xczu3eg-sfva625-1-i. Valid board_part values can be retrieved with the 'get_board_parts' Tcl command. Check if board.repoPaths parameter is set and the board_part is installed from the tcl app store.
| hsi::open_hw_design: Time (s): cpu = 00:00:12 ; elapsed = 00:00:12 . Memory (MB): peak = 417.074 ; gain = 137.816 ; free physical = 227 ; free virtual = 9041
| The new hardware specification file contains the same information as the current specification file. No changes were done to the workspace.
| INFO: create app using fsbl_hwproj project
| Project with name 'fsbl' already exists in workspace.
| Failed to create Application project fsbl.Project with name fsbl already exists in workspace.
| while executing
| "error [dict get $msg err]"
| (procedure "xsdk_eval" line 15)
| invoked from within
| "xsdk_eval $chan "Xsdk" createProject "o{$fmt}" e [list $data]"
| (procedure "createapp" line 76)
| invoked from within
| "createapp -name $params(pname) -proc $params(processor) -hwproject $params(hwpname) -os $params(osname) -lang c -app $params(app) -arch $params(arch..."
| invoked from within
| "if { $params(ws) ne "" } {
| #Local Work Space available
| setws $params(ws)
| if { [catch {importprojects $params(ws)} result] } {
| puts "XSCTHELPER IN..."
| (file "/home/z3r0/sf_Share/uz3eg_pciec_2017_2/build/tmp/work/plnx_aarch64-xilinx-linux/fsbl/2017.4+gitAUTOINC+77448ae629-r0/app.tcl" line 120)
| WARNING: /home/z3r0/sf_Share/uz3eg_pciec_2017_2/build/tmp/work/plnx_aarch64-xilinx-linux/fsbl/2017.4+gitAUTOINC+77448ae629-r0/temp/run.do_configure.12613:1 exit 1 from 'eval xsct /home/z3r0/sf_Share/uz3eg_pciec_2017_2/build/tmp/work/plnx_aarch64-xilinx-linux/fsbl/2017.4+gitAUTOINC+77448ae629-r0/app.tcl -ws /home/z3r0/sf_Share/uz3eg_pciec_2017_2/build/../components/plnx_workspace/fsbl -pname fsbl -rp /opt/petalinux-v2017.1-final/tools/hsm/data/embeddedsw -processor psu_cortexa53_0 -hdf /home/z3r0/sf_Share/uz3eg_pciec_2017_2/build/tmp/deploy/images/plnx_aarch64/Xilinx-plnx_aarch64.hdf -arch 64 ${APP_ARG} ${MISC_ARG}'
| ERROR: Function failed: do_configure (log file is located at /home/z3r0/sf_Share/uz3eg_pciec_2017_2/build/tmp/work/plnx_aarch64-xilinx-linux/fsbl/2017.4+gitAUTOINC+77448ae629-r0/temp/log.do_configure.12613)
ERROR: Task (/opt/petalinux-v2017.1-final/components/yocto/source/aarch64/layers/meta-xilinx-tools/recipes-bsp/fsbl/fsbl_git.bb:do_configure) failed with exit code '1'
NOTE: Tasks Summary: Attempted 2415 tasks of which 1877 didn't need to be rerun and 1 failed.
Summary: 1 task failed:
/opt/petalinux-v2017.1-final/components/yocto/source/aarch64/layers/meta-xilinx-tools/recipes-bsp/fsbl/fsbl_git.bb:do_configure
Summary: There was 1 WARNING message shown.
Summary: There was 1 ERROR message shown, returning a non-zero exit code.
ERROR: Failed to build project
Questions:
- What are these two errors and one critical warning caused by and how do I fix them? The primary problem seems to be that the fsbl_git.bb fails.
- The critical warning stating that the board_part definition was not found is also present. I have the board definition files installed in Vivado on my Windows machine where I created the Vivado project and created the project with that template, but it is not install in my VM running Linux. Is this the reason?
- Is this entire process that I've gone through correct or is there something fundamental or even small that I'm missing?
Thank you very much in advance. I've been tearing out my hair with frustration dealing with this.
- WBLee
