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Software Application Development Get Frame count for VDMA R/W and generate interrupts
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Get Frame count for VDMA R/W and generate interrupts

Former Member
Former Member over 10 years ago

Hello folks,

using bare metal for some video processing.  We are trying to trigger some interrupts based on the Frames being read and written to call our IP in ARM.

We have tried to use XAxiVdma_GetFrameCounter function and such but it always outputs zero.

Any help?

Thanks,
Pre

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  • Former Member
    0 Former Member over 10 years ago

    After having gone through several version of PG020 (Vivado throws a curve ball) Here is what we have done (its a psuedo code) (
    in vivaod we had all the interrupts enabled (without this interrupts weren't firing at all and makes sense now)
    set_property -dict [list CONFIG.C_ENABLE_DEBUG_INFO_14 {1}] [get_bd_cells axi_vdma_0]
    set_property -dict [list CONFIG.C_ENABLE_DEBUG_INFO_15 {1}] [get_bd_cells axi_vdma_0]
    set_property -dict [list CONFIG.C_ENABLE_DEBUG_INFO_7 {1}] [get_bd_cells axi_vdma_0]
    set_property -dict [list CONFIG.C_ENABLE_DEBUG_INFO_6 {1}] [get_bd_cells axi_vdma_0]
    As soon as we did this, only the first frame gets latched in and that's that (S2MM_DMACR = 0x03031053
    S2MM_DMASR = 0x00035810 values explain it)
    In the ARM (once again based on several PG020 revisions) (Goal, have 3 frames being written in DDR, generate interrupt to call the C code to process it, write it back to DDR to be read out)

    int vfb_frameinterrupt_CR_RX(XAxiVdma *pAxiVdma)
    {
    //Setup frame interrupt flag in the control register
    // Bit 23 to 16 Frame count and delay counter: set to 3
    // Bit 12 Frame count interrupt enable: set to 1
    // Bit 4 Frame count enable: set to 1
    u32 uBaseAddr = pAxiVdma->BaseAddr;
    u32 uDMACR = *((volatile int *)(uBaseAddr+XAXIVDMA_RX_OFFSET+XAXIVDMA_CR_OFFSET ));
    uDMACR |= 0x03031010;
    *((volatile int *)(uBaseAddr+XAXIVDMA_RX_OFFSET+XAXIVDMA_CR_OFFSET )) = uDMACR;
    }
    how and when would we want to clear the interrupts?  what is the sequence of enabling interrupts, reading interrupts, clearing interrupt and reading it again (would that be it, didn't work).  Any help is appreciated, deeply!

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