Hello,
Below are the queries that I have regarding the ethernet connectivity on microzed board (I have recently started working on project related to fpga and N/Ws) and would like someone to shed some light on them:
1. Is it possible to capture/send the packets received via ethernet in VHDL (vivado) rather than software dev in C?
2. What is the differnce between PS based ethernet and PL based, also, what IPs can be used in PL for ethernet.
3. I have ISM Networking FMC Module 2 (https://www.xilinx.com/products/boards-and-kits/1-420hwd.html) and would like to use the board for ethernet, however, I don't know what are the IPs that will be required for enabling ethernet on that board.
I have been able to route the packets to PL (BRAM) from PS ethernet. However, the packets were looped back from Tx to Rx buffer and I am not sure about the changes that would be required to route the packets to my PC. I changed the destination MAC address to my PC's address and commented the line which was causing the loopback, however, I am unable to see any data using wireshark, besides, the ethernet cable is also shown as unplugged.
I have already read a lot of posts on this forum and on the xilinx forum as well but the information gets a little overwhemling for a beginner. Kindly let me know if there are any additional documents that I can refer to gain more knowledge about these things. Also, on completion of this task, I intend to share my work with others.
Thank you!
