Actions
Forum Thread Details
  • State Not Answered
  • Replies 3 replies
  • Subscribers 174 subscribers
  • Views 1517 views
  • Users 0 members are here
Related

Easiest way to access PL memory from PS on Zynq/Zedboard

linux.matthew

I'm trying to design an app where my Zedboard's FPGA takes some input data, processes it, and puts the results somewhere in its DDR memory.  Rather than DMA it over to the PS side for further processing, is there a way for me to allow the PS to access that data directly?  Seems like mmap() is the way to go, but I only see the PS side memory listed in my devicetree.dts.  I vaguely recall someone posting a how to on adding the PL DDR as another 512MB block, but I can't seem to find that anymore.

Thanks for any help.

Matt

  • 0

    All of the 512 MByte DDR memory on the ZedBoard is connected directly to a built-in DDR controller in the PS section of the Zynq device. With the exception of Block Ram memory in the Programmable Logic (PL) all of the Zynq RAM on the Zedboard, including the ARM caches, the DDR, and the On Chip Memory (OCM) is contained in the Processor Section (PS) of the device.

     

    It is conceivable to build a 'soft' DDR controller in the Zynq PL and connect DDR memory directly to the PL section on a custom board but that is not an option on the ZedBoard.

     

    So, unless your application data will fit in the available BRAM memory, you will need to move your data to the PS section in some fashion. If your data set is small enough you could build an AXI based BRAM memory controller in the PL and the ARM could access it directly as you have in mind.

     

    -Gary

  • 0 in reply to Former Member

    Gary, Thanks a lot for your clarifications.

    A few more aspects:

    1) Since on Zedboard DDR is only connected to PS side, this would be the only way to access it then (using integrated to PScontroller). However it's still possible to insert say MIG controller to Zedboard'd vivado design, although I'm not sure how it'll then handle it further on in implementation parts.. 

    BTW,  since any DDR  controller would need a processing power (iether ARM or say a Microblaze) would it be possible to connect MIG controller and ARM core? Or since in Zedboard MIG is not connected with DDR, there is not much use of such an experiments?

    2) Another question is more related to mini-ITX type boards, where 1G DDR is split between PS and PL parts. In such a board I assume it would be possible to use both  MIG (with Microblaze) and PS parts both addressing different parts of DDR in the same design. Is it not? or ARM controlling MIG? Question here is also regarding performance, if say I need to transfer data from ADC to DDR (in mini-ITX), which way would be more preferable using PS or MIG?

    Thank you in advance.

  • 0

    Hi there,
    1) the DDR that is on this board is ONLY connected to PS pins.  The MIG is used for connecting to memory that is on the PL pins.  I would not spend time on this experiment.

    2) You can use both independently if the memory is on BOTH the PL and PS pins.  You can use AXI to connect to memory through the PL pins.  As for what is more preferable, it depends on what you are trying to do with the data.  If you need PL acceleration, it is better to keep it there to minimize data flowing through an AXI interconnect until you need to move the data.  If you need to process it by the PS, then pass it directly to the DDR over one of the many AXI interconnects provided.

    --Dan