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pulsar linux PL mmio hangs

chrisroelle

Hi all -

My apologies for the simple question.

Using Pulsar Linux release 8, out of the box on a MicroZed 7010 board.  With either the provided PL image or my own PL image (which does nothing more than expose an axi_gpio at 0x41200000), accessing a memory mapped IO in the region 0x40000000-0x7FFFFFFF seems to hang the whole board.  I think the memory mapping is working OK because I can see the expected value 0x308xxxxx in the devcfg.MCTRL register if I read address 0xF8007080, but I'm not able to read in the PL memory range.  I must be missing something simple?

 

Thanks,

CR

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    Hi chrisroelle,

    How is your device tree being configured for the axi_gpio instance you have in the PL?

    For example, when I want to access axi_gpio control registers in the PL from user space, I have some entries showing up in the device tree.  These entries look like this:

    tamba_pl: amba_pl {
    tt#address-cells = <2>;
    tt#size-cells = <2>;
    ttcompatible = "simple-bus";
    ttranges ;
    ttaxi_gpio_0: gpio@80000000 {
    ttt#gpio-cells = <2>;
    tttcompatible = "xlnx,xps-gpio-1.00.a";
    tttgpio-controller ;
    tttreg = <0x0 0x80000000 0x0 0x10000>;
    tttxlnx,all-inputs = <0x1>;
    tttxlnx,all-inputs-2 = <0x0>;
    tttxlnx,all-outputs = <0x0>;
    tttxlnx,all-outputs-2 = <0x0>;
    tttxlnx,dout-default = <0x00000000>;
    tttxlnx,dout-default-2 = <0x00000000>;
    tttxlnx,gpio-width = <0x8>;
    tttxlnx,gpio2-width = <0x20>;
    tttxlnx,interrupt-present = <0x0>;
    tttxlnx,is-dual = <0x0>;
    tttxlnx,tri-default = <0xFFFFFFFF>;
    tttxlnx,tri-default-2 = <0xFFFFFFFF>;
    tt};
    ttaxi_gpio_1: gpio@80010000 {
    ttt#gpio-cells = <2>;
    tttcompatible = "xlnx,xps-gpio-1.00.a";
    tttgpio-controller ;
    tttreg = <0x0 0x80010000 0x0 0x10000>;
    tttxlnx,all-inputs = <0x0>;
    tttxlnx,all-inputs-2 = <0x0>;
    tttxlnx,all-outputs = <0x1>;
    tttxlnx,all-outputs-2 = <0x0>;
    tttxlnx,dout-default = <0x00000000>;
    tttxlnx,dout-default-2 = <0x00000000>;
    tttxlnx,gpio-width = <0x8>;
    tttxlnx,gpio2-width = <0x20>;
    tttxlnx,interrupt-present = <0x0>;
    tttxlnx,is-dual = <0x0>;
    tttxlnx,tri-default = <0xFFFFFFFF>;
    tttxlnx,tri-default-2 = <0xFFFFFFFF>;
    tt};
    ttaxi_gpio_2: gpio@80020000 {
    ttt#gpio-cells = <2>;
    tttcompatible = "xlnx,xps-gpio-1.00.a";
    tttgpio-controller ;
    tttreg = <0x0 0x80020000 0x0 0x10000>;
    tttxlnx,all-inputs = <0x1>;
    tttxlnx,all-inputs-2 = <0x0>;
    tttxlnx,all-outputs = <0x0>;
    tttxlnx,all-outputs-2 = <0x0>;
    tttxlnx,dout-default = <0x00000000>;
    tttxlnx,dout-default-2 = <0x00000000>;
    tttxlnx,gpio-width = <0x3>;
    tttxlnx,gpio2-width = <0x20>;
    tttxlnx,interrupt-present = <0x0>;
    tttxlnx,is-dual = <0x0>;
    tttxlnx,tri-default = <0xFFFFFFFF>;
    tttxlnx,tri-default-2 = <0xFFFFFFFF>;
    tt};
    t};

    Also, this Xilinx forum post may interest you:

    https://forums.xilinx.com/t5/Embedded-Linux/Zynq-Linux-Freeze-on-Memory-Mapped-Peripheral-Write/td-p/246156

    Regards,

    -Kevin

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  • 0

    Hi chrisroelle,

    How is your device tree being configured for the axi_gpio instance you have in the PL?

    For example, when I want to access axi_gpio control registers in the PL from user space, I have some entries showing up in the device tree.  These entries look like this:

    tamba_pl: amba_pl {
    tt#address-cells = <2>;
    tt#size-cells = <2>;
    ttcompatible = "simple-bus";
    ttranges ;
    ttaxi_gpio_0: gpio@80000000 {
    ttt#gpio-cells = <2>;
    tttcompatible = "xlnx,xps-gpio-1.00.a";
    tttgpio-controller ;
    tttreg = <0x0 0x80000000 0x0 0x10000>;
    tttxlnx,all-inputs = <0x1>;
    tttxlnx,all-inputs-2 = <0x0>;
    tttxlnx,all-outputs = <0x0>;
    tttxlnx,all-outputs-2 = <0x0>;
    tttxlnx,dout-default = <0x00000000>;
    tttxlnx,dout-default-2 = <0x00000000>;
    tttxlnx,gpio-width = <0x8>;
    tttxlnx,gpio2-width = <0x20>;
    tttxlnx,interrupt-present = <0x0>;
    tttxlnx,is-dual = <0x0>;
    tttxlnx,tri-default = <0xFFFFFFFF>;
    tttxlnx,tri-default-2 = <0xFFFFFFFF>;
    tt};
    ttaxi_gpio_1: gpio@80010000 {
    ttt#gpio-cells = <2>;
    tttcompatible = "xlnx,xps-gpio-1.00.a";
    tttgpio-controller ;
    tttreg = <0x0 0x80010000 0x0 0x10000>;
    tttxlnx,all-inputs = <0x0>;
    tttxlnx,all-inputs-2 = <0x0>;
    tttxlnx,all-outputs = <0x1>;
    tttxlnx,all-outputs-2 = <0x0>;
    tttxlnx,dout-default = <0x00000000>;
    tttxlnx,dout-default-2 = <0x00000000>;
    tttxlnx,gpio-width = <0x8>;
    tttxlnx,gpio2-width = <0x20>;
    tttxlnx,interrupt-present = <0x0>;
    tttxlnx,is-dual = <0x0>;
    tttxlnx,tri-default = <0xFFFFFFFF>;
    tttxlnx,tri-default-2 = <0xFFFFFFFF>;
    tt};
    ttaxi_gpio_2: gpio@80020000 {
    ttt#gpio-cells = <2>;
    tttcompatible = "xlnx,xps-gpio-1.00.a";
    tttgpio-controller ;
    tttreg = <0x0 0x80020000 0x0 0x10000>;
    tttxlnx,all-inputs = <0x1>;
    tttxlnx,all-inputs-2 = <0x0>;
    tttxlnx,all-outputs = <0x0>;
    tttxlnx,all-outputs-2 = <0x0>;
    tttxlnx,dout-default = <0x00000000>;
    tttxlnx,dout-default-2 = <0x00000000>;
    tttxlnx,gpio-width = <0x3>;
    tttxlnx,gpio2-width = <0x20>;
    tttxlnx,interrupt-present = <0x0>;
    tttxlnx,is-dual = <0x0>;
    tttxlnx,tri-default = <0xFFFFFFFF>;
    tttxlnx,tri-default-2 = <0xFFFFFFFF>;
    tt};
    t};

    Also, this Xilinx forum post may interest you:

    https://forums.xilinx.com/t5/Embedded-Linux/Zynq-Linux-Freeze-on-Memory-Mapped-Peripheral-Write/td-p/246156

    Regards,

    -Kevin

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