For a ZedBoard (with 512 MB) running a bare metal application in CPU1, will the DDR memory addresses always be mapped from 0x00000000 to 0x1FFFFFFF?
For Linux running in CPU0, will the memory addresses mapped by mmap("/dev/mem") be mapped to that same address range?
I have reserved memory from Linux and can read/write that memory through mmap("/dev/mem") and exchange data through AXI DataMovers in the programmable logic. However, the bare metal application doesn't see the values at the same locations. Can anyone suggest why I'm not seeing the data in the bare metal application?