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Software Application Development Question about using UART0 through MIO50 & 51
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Question about using UART0 through MIO50 & 51

Former Member
Former Member over 9 years ago

Hello:
  We recently are using ZYNQ clg484 -1 for our developing, we intended to use MIO 50 and 51 as UART0, but it turns out that the voltage of the MIO 50 and 51 would turn low once the linux boot completed, so we are not able to use it as the UART0.
  Here is how I did it:
  1) In XPS, check UART0 and map it to MIO 50 & 51.
  2) Export to SDK and create a FSBL and the a BOOT.BIN.
  3) Modify the dts file by adding UART0 node info.
  But it turn out that this wouldn't work, yet I tried map UART0 to MIO 14 & 15, and it work well in linux, the steps are the same as what I do with MIO 50 & 51.
  Is there anyone who knows why it works that way? Hope to get help from you!
  Sry for my poor English writing, hope you could understand what I am talking about.
  Yours sincerely!

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  • Former Member
    0 Former Member over 9 years ago

    Hello,

     

    What Zynq board are you using? A ZedBoard? MIO 50 and 51 are connected Push Buttons on the ZedBoard.

     

    What Linux are you using?

     

    You mention XPS. The Xilinx ISE tools are very dated and I would suggest that you move to the Vivado tool suite for the best results and support.

     

    -Gary

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  • Former Member
    0 Former Member over 9 years ago in reply to Former Member

    Thanks for your reply, though it did not help. Finally I figured out what was wrong, it seems that in the linux-digilent-3.3.0-digilent-12.07-zed-beta kernel, in the xslcr.c file, the regs of MIO 50 & 51 was modified, so it is not the same with what was written in the fsbl. The easiest way to correct it was to comment those two lines.

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