I been trying to use those instructions to enable HDMI output for PetaLinux image I am trying to build for AVNET Mini-ITX board (Zynq). http://blog.idv-tech.com/2014/05/25/hdmi-on-zedboard-with-petalinux/
I been using Vivado 2015.2.1 and petalinux of the same version.
However, after I have created hdf file, created petalinux project and have specified use of linux kernel from the agilentdevices github, and have updated device tree based on their example for mini-itx board, my image fails to boot. I am trying to boot through JTAG.
It seems to hang after loading driver for PL330 DMAC.
=================================================
Error: Driver 'mwipcore' is already registered, aborting...
dma-pl330 f8003000.dmac: Loaded driver for PL330 DMAC-241330
dma-pl330 f8003000.dmac: DBUFF-128x8bytes Num_Chans-8 Num_Peri-4 Num_Events-16
=================================================
Does anyone know how I can resolve this issue?
Here is more complete boot log:
=================================================
Memory policy: Data cache writealloc
: 0xffc00000 - 0xfff00000 (3072 kB)
vmalloc : 0xf0800000 - 0xff800000 ( 240 MB)
lowmem : 0xc0000000 - 0xf0000000 ( 768 MB)
pkmap : 0xbfe00000 - 0xc0000000 ( 2 MB)
modules : 0xbf000000 - 0xbfe00000 ( 14 MB)
.text : 0xc0008000 - 0xc0679230 (6597 kB)
.init : 0xc067a000 - 0xc0b04000 (4648 kB)
.data : 0xc0b04000 - 0xc0b40200 ( 241 kB)
.bss : 0xc0b40200 - 0xc0b62a68 ( 139 kB)
Preemptible hierarchical RCU implementation.
Build-time adjustment of leaf fanout to 32.
RCU restricting CPUs from NR_CPUS=4 to nr_cpu_ids=2.
RCU: Adjusting geometry for rcu_fanout_leaf=32, nr_cpu_ids=2
NR_IRQS:16 nr_irqs:16 16
slcr mapped to f0802000
led for Cortex-A9
L2C-310 ID prefetch enabled, offset 1 lines
L2C-310 dynamic clock gating enabled, standby mode enabled
L2C-310 cache controller enabled, 8 ways, 512 kB
L2C-310: CACHE_ID 0x410000c8, AUX_CTRL 0x76760001
zynq_clock_init: clkc starts at f0802100
Zynq clock init
sched_clock: 64 bits at 333MHz, resolution 3ns, wraps every 4398046511103ns
clocksource: arm_global_timer: mask: 0xffffffffffffffff max_cycles: 0x4ce07af025, max_idle_ns: 440795209040 ns
clocksource: ttc_clocksource: mask: 0xffff max_cycles: 0xffff, max_idle_ns: 537538477 ns
timer #0 at f080a000, irq=17
1332.01 BogoMIPS (lpj=6660096)
pid_max: default: 32768 minimum: 301
Mount-cache hash table entries: 2048 (order: 1, 8192 bytes)
Mountpoint-cache hash table entries: 2048 (order: 1, 8192 bytes)
CPU: Testing write buffer coherency: ok
CPU0: thread -1, cpu 0, socket 0, mpidr 80000000
Setting up static identity map for 0x82c0 - 0x8318
CPU1: thread -1, cpu 1, socket 0, mpidr 80000001
Brought up 2 CPUs
SMP: Total of 2 processors activated (2664.03 BogoMIPS).
CPU: All CPU(s) started in SVC mode.
devtmpfs: initialized
VFP support v0.3: implementor 41 architecture 3 part 30 variant 9 rev 4
clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 19112604462750000 ns
pinctrl core: initialized pinctrl subsystem
NET: Registered protocol family 16
cpuidle: using governor ladder
cpuidle: using governor menu
uplicate filename '/bus/platform/devices/41600000.i2c'
Modules linked in:
CPU: 1 PID: 1 Comm: swapper/0 Not tainted 4.4.0 #2
Hardware name: Xilinx Zynq Platform
[<c001586c>] (unwind_backtrace) from [<c00125a0>] (show_stack+0x10/0x14)
[<c00125a0>]rom [<c011de3c>] (sysfs_warn_dup+0x50/0x70)
[<c011de3c>] (sysfs_warn_dup) from [<c011e154>] (sysfs_do_create_link_sd+0x90/0xac)
[<c011e154>] (sysfs_do_create_link_sd) from [<c023b024>] (bus_add_device+0xb4/0x148)
[<c023b024>] (bus_add_device) from [<c023972c>] (device_add+0x32c/0x504)
[<c023972c>] (device_add) from [<c03565cc>] (of_platform_device_create_pdata+0x80/0xb8)
[<c03565cc>] (of_platform_device_create_pdata) from [<c0356814>] (of_platform_bus_create+0x204/0x2b8)
[<c0356814>] (of_platfor27e8>] (zynq_init_machine) from [<c067d34c>] (customize_machine+0x1c/0x40)
[<c067d34c>] (customize_machine) from [<c00097c0>] (do_one_initcall+0x100/0x1b4)
[<c00097c0>] (do_one_initcall) from [<c067ad8c>] (kernel_init_freeable+0x11c/0x1e4)
[<c067ad8cAdvanced Linux Sound Architecture Driver Initialized.
clocksource: Switched to clocksource arm_global_timer
futex hash table entries: 512 (order: 3, 32768 bytes)
bounce: pool size: 64 pages
io scheduler noop registered
io scheduler deadline registered
io scheduler cfq registered (default)
Error: Driver 'mwipcore' is already registered, aborting...
dma-pl330 f8003000.dmac: Loaded driver for PL330 DMAC-241330
dma-pl330 f8003000.dmac: DBUFF-128x8bytes Num_Chans-8 Num_Peri-4 Num_Events-16